FEC Code Word Frame Synchronization via Training Sequence

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Solution Overview

Problem

In high-speed optical transmission systems, especially 100 Gbps long-distance systems, existing frame synchronization methods at the physical layer require additional overhead due to the insertion of FEC frame headers, leading to increased system line rate and resource consumption, which is inefficient and unstable.

Innovation Solution

The method involves using an existing training sequence for frame synchronization of FEC code words at the physical layer, eliminating the need for additional FEC frame headers and optimizing the usage of the training sequence for channel estimation and equalization, thereby reducing system overhead and maintaining high throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an additional FEC frame header is inserted into each SD FEC code word to implement frame alignment at the physical layer, then frame synchronization is achieved, but system overhead increases and line rate increases

Engineering Contradiction:
Improveframe synchronizationVSAvoidsystem overhead
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The training sequence originally designed for channel estimation and equalization is made to serve dual purposes: it simultaneously enables frame synchronization for FEC code words. By detecting the training sequence position, the system can identify both channel characteristics and frame boundaries, eliminating the need for separate FEC frame headers and reducing overall system overhead.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If an additional FEC frame header is inserted into each SD FEC code word to implement frame alignment, then frame synchronization is achieved, but system line rate increases

Engineering Contradiction:
Improveframe synchronizationVSAvoidsystem line rate
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The training sequence is designed to fulfill multiple functions simultaneously: channel estimation, channel equalization, and frame synchronization. This multi-functionality prevents the need for additional FEC frame headers, thereby avoiding increases in system line rate while still achieving reliable frame alignment at the physical layer.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If the training sequence is reused for frame synchronization, then system overhead is reduced, but the training sequence must serve multiple functions simultaneously

Engineering Contradiction:
Improvesystem overheadVSAvoidtraining sequence functionality
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The training sequence is engineered to perform multiple functions: channel estimation, channel equalization, and frame synchronization. The receiver detects the training sequence position to establish frame boundaries, while also using it for channel characterization, thereby reducing overhead without significantly increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The training sequence embedded within the FEC code word structure serves itself for multiple purposes. By detecting the training sequence, the system automatically obtains both channel information and frame synchronization information without requiring additional dedicated structures, making the system more efficient and self-sufficient.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP2775648B1Data sender, data receiver and frame synchronization method
Publication Date: 2017.03.01 HUAWEI TECH CO LTD
  • EP2775648B1 patent drawingFigure 1~2
  • EP2775648B1 patent drawingFigure 3
  • EP2775648B1 patent drawingFigure 4(a)~4(b)

AI summary

Embodiments of the present invention provide a data transmitter, a data receiver, and a frame synchronization method. The data transmitter includes a coding module and a processing module, where the coding module is configured to perform forward error correction FEC coding on sent data to obtain an FEC code word, and output the FEC code word and an indication signal for indicating a boundary position of the FEC code word to the processing module; and the processing module is configured to insert a training sequence into the FEC code word according to the indication signal, so that a data receiver determines the boundary position of the FEC code word according to the training sequence. The data receiver includes a processing module and a decoding module. According to the technical solutions, a training sequence that will originally be inserted into an FEC code word is used to help performing frame synchronization. In this way, a system overhead does not increase, and therefore a system line rate does not increase; in addition, due to the improvement in the usage efficiency of the training sequence, system performance can be improved.