FEC Decoder Processor Scheduling for Power and Load Balance
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Solution Overview
Problem
Existing methods for decoding forward error correction (FEC) codewords in transceivers face inefficiencies in processor utilization, leading to unnecessary power consumption and suboptimal performance due to inconsistent load balancing and activation/deactivation of processors.
Innovation Solution
A method and apparatus for scheduling and operating processors that dynamically adjust activation and deactivation based on thresholds for processor increment and decrement rates, using low pass filtering to optimize processor usage and minimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If processors are dynamically activated and deactivated for decoding FEC codewords, then power consumption is reduced, but processor utilization efficiency deteriorates due to frequent state changes
Solution Approach 1:
The system dynamically adjusts processor activation state based on real-time load conditions. When the number of active processors exceeds the threshold (N-M), some processors are deactivated to save power. When active processors fall below the threshold (N-M), processors are reactivated to maintain decoding performance. This dynamic adjustment resolves the contradiction by adapting processor states to actual workload requirements.
Solution Approach 2:
The scheduler continuously monitors the number of active processors and compares it against the threshold (N-M). Based on this feedback, it decides whether to activate or deactivate processors. This closed-loop control ensures that processor utilization remains efficient while power consumption is optimized, preventing both over-provisioning and under-provisioning of processing resources.
2Speed
If the number of active processors is increased to improve decoding performance, then processing speed is improved, but power consumption increases
Solution Approach 1:
The system changes the operational parameter (number of active processors) based on workload demands. The threshold (N-M) is established to balance processing speed and power consumption. When decoding load is high, more processors are activated to maintain speed. When load is low, processors are deactivated to reduce power consumption. This parameter adjustment resolves the contradiction between speed and energy usage.
3Loss of energy
If processors are frequently activated and deactivated to optimize power consumption, then energy efficiency is improved, but system stability deteriorates
Solution Approach 1:
The system establishes a threshold (N-M) that acts as a cushion against frequent state changes. By requiring the number of active processors to exceed this threshold before deactivation occurs, the system prevents premature or unnecessary processor state changes. This cushioning effect stabilizes the system by reducing the frequency of activations and deactivations while still achieving energy efficiency goals.
Data Source
AI summary
An apparatus for and a method of operating processors (108) for decoding forward error correction, FEC, codewords. Activation of a processor (108) for decoding FEC codewords is inhibited when a rate of an increment in processors (108) that are active for decoding FEC codewords is larger than a first threshold.