FEC Encoding with Intermediate Symbol Groups for Lower Parity Overhead

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Solution Overview

Problem

Current communication technologies face challenges in increasing data throughput due to physical bandwidth limitations and high overhead from conventional forward error correction (FEC) encoding, which affects data rates in high-speed applications like Terabit Ethernet.

Innovation Solution

Implementing a novel FEC encoding technique that generates intermediate results using sets of multiple bits corresponding to modulation symbols, reducing parity information overhead by employing XOR operations and Bose-Chaudhuri-Hocquenghem (BCH) coding, while maintaining error recovery robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional FEC encoding is used to ensure error correction robustness, then reliability is improved, but overhead increases reducing data throughput

Engineering Contradiction:

Improveerror correction robustnessVSAvoidparity information overhead

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the parity generation process by dividing data bits into groups and generating intermediate results for each group separately. This segmentation allows for more efficient parity calculation that reduces overall overhead while maintaining error correction capability across the entire data stream.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary encoding operations to generate intermediate results from data bits before final parity generation. This preliminary action of creating intermediate representations allows the system to reduce the amount of parity information needed while preserving error correction robustness through the structured encoding approach.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If data transmission rate is increased to meet growing demand, then productivity is improved, but bandwidth limitations are approached causing signal quality degradation

Engineering Contradiction:

Improvedata transmission rateVSAvoidsignal quality

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the parameters of the FEC encoding process by using intermediate results and modified parity generation techniques. This parameter change in the encoding approach allows for reduced overhead which effectively increases the data transmission rate while maintaining signal quality through more efficient error correction.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250392327A1Forward error correction encoding using intermediate information corresponding to multiple modulation symbols

Publication Date: 2025.12.25 MARVELL ASIA PTE LTD

AI summary

Digital signal processing (DSP) circuitry of a transceiver generates intermediate results corresponding to transmit bits that are to be transmitted. Each of at least some of the intermediate results correspond to an encoding of a respective set of multiple bits from amongst the transmit bits. The respective set of multiple bits includes bits corresponding to multiple modulation symbols to be transmitted by the transceiver. The DSP circuitry encodes, according to an FEC code, the intermediate results corresponding to the respective sets of multiple bits to generate parity bits. The DSP circuitry maps, according to a modulation technique, the transmit bits and the parity bits to modulation symbols to generate a digital transmit signal. A digital-to-analog converter (DAC) converts the digital transmit signal to an analog transmit signal.