Feed-Forward APC for Critical Dimension Uniformity
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Solution Overview
Problem
Current Advanced Process Control (APC) methods in semiconductor fabrication are inadequate for quickly achieving critical dimension uniformity during the initial processing of new chip designs, often requiring multiple feedback cycles, leading to increased time and costs due to unknown optimal processing parameters and delayed processing feedback.
Innovation Solution
Implementing a semiconductor fabrication system that utilizes feed-forward information from historical data to refine exposure dose maps, reducing the number of cycles needed to achieve critical dimension uniformity by selecting a suitable finished wafer and using its data to control photolithography and etching processes, thereby reducing operator interaction and improving tool productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional feedback-based APC methods are used for new chip design processing, then process control is maintained, but multiple cycles (3 or more) are required to achieve critical dimension uniformity within tolerance
Solution Approach 1:
The patent applies preliminary action by using feed-forward control to predict and pre-adjust processing parameters before the actual processing cycle. Historical data and process models are analyzed in advance to determine optimal exposure dose maps and processing conditions, allowing the system to start with pre-optimized parameters rather than relying on feedback from previous cycles. This reduces the number of cycles needed to achieve critical dimension uniformity from three or more to potentially one cycle.
2Manufacturing precision
If multiple feedback cycles are performed to achieve quality parameters within tolerance, then manufacturing precision is improved, but productivity decreases due to extended processing time
Solution Approach 1:
The system performs preliminary analysis of historical data and process models to pre-determine optimal processing parameters before production cycles begin. This feed-forward approach allows the photolithography and etching processes to start with optimized settings, reducing the need for multiple feedback cycles and thereby improving tool productivity while maintaining quality parameter tolerances.
Solution Approach 2:
The patent combines feed-forward control with feedback mechanisms. While the primary innovation is feed-forward, the system still incorporates feedback from process monitoring and measurement tools to validate and refine the predicted parameters. This hybrid approach ensures that manufacturing precision is maintained through both predictive optimization and corrective feedback when needed.
3Reliability
If optimal processing parameters are unknown at the start of pilot processing, then process safety is maintained through conservative approaches, but the number of cycles increases leading to time loss
Solution Approach 1:
The patent addresses the unknown optimal parameters problem by performing preliminary analysis using historical data and process models before the pilot run. The system predicts optimal exposure dose maps and processing parameters in advance, allowing the process to start with informed settings rather than conservative defaults. This reduces cycle time while maintaining process stability through model-based predictions.
Solution Approach 2:
The patent introduces process models and historical data analysis as intermediaries between the unknown optimal parameters and the actual processing. These models act as mediators that translate historical process information into predictive recommendations for optimal parameters, enabling the system to bridge the knowledge gap without requiring multiple trial cycles.
Data Source
AI summary
Embodiments of the present disclosure disclose a method of forming a new integrated circuit design on a semiconductor wafer using a photolithography tool. The method includes selecting a previously processed wafer having a past integrated circuit design different than the new integrated circuit design, selecting a plurality of critical dimension (CD) data points extracted from the previously processed wafer after the previously processed wafer was etched, and creating a field layout and associated baseline exposure dose map for the new integrated circuit design. The method also includes refining each field in the baseline exposure dose map based on a difference between an average CD for the previously processed wafer and an average CD for each field in the field layout and controlling the exposure of the photolithography tool according to the refined baseline exposure dose map to form the new integrated circuit design on the semiconductor wafer.