Feedback DAC Cell Error Measurement Under Constant Bias

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Solution Overview

Problem

Existing DAC error measurement circuits suffer from unsatisfactory measurement accuracy due to mismatch errors in feedback DACs, particularly in high-speed DSM designs, where different comparators are used for different current units, leading to inconsistent and inaccurate measurement results.

Innovation Solution

A DAC error measurement apparatus that uses a reconfigurable loop filter to provide a low-gain input to the quantizer, combined with a direct-current signal and a square wave signal, to ensure that only one digit flips while others remain steady, thereby isolating the measurement of each source cell's error under consistent bias conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a complex signal excitation source, such as a full-swing oscillation signal, is used in the DAC error measurement circuit, then the measurement capability is improved, but the circuit complexity is increased

Engineering Contradiction:
ImproveDAC error measurement capabilityVSAvoidDAC error measurement circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the signal type from complex full-swing oscillation to simple direct-current or low-frequency square wave signals. This parameter change in signal characteristics reduces circuit complexity while maintaining measurement capability through the specific measurement methodology that processes these simpler signals to extract DAC error information

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If different comparators are used to measure different current units, then the measurement coverage is improved, but the measurement accuracy is deteriorated due to inconsistency

Engineering Contradiction:
Improvemeasurement coverageVSAvoidmeasurement accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent makes a single comparator perform the measurement function for all current units sequentially. The comparator measures each current unit Icell(i) in turn by switching the digital output D to different values, allowing one universal comparator to replace multiple specialized comparators while maintaining measurement capability across all units

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses the same comparator and measurement methodology for each current unit, creating a consistent measurement template that is applied uniformly across all units. This copying of the measurement approach ensures identical measurement conditions and accuracy for each unit

Inventive Principle:
Principle #26Copying

3Measurement precision

If a 4-bit quantizer is used instead of a 1-bit quantizer, then the SQNR is improved, but the linearity is deteriorated due to feedback DAC mismatch

Engineering Contradiction:
Improvesignal-to-quantization-noise ratioVSAvoidlinearity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the measured mismatch errors of the feedback DAC are used to generate correction values that are applied to compensate for the mismatch. This feedback loop continuously monitors and corrects the linearity degradation caused by DAC mismatch, allowing the system to maintain both high SQNR from the 4-bit quantizer and acceptable linearity

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3736987B1DAC error measurement method and device
Publication Date: 2026.01.21 HUAWEI TECH CO LTD
  • EP3736987B1 patent drawingFigure 1
  • EP3736987B1 patent drawingFigure 2(a)
  • EP3736987B1 patent drawingFigure 2(b)

AI summary

A DAC error measurement method and apparatus are disclosed. The apparatus includes: an ADC and a feedback DAC, where a measurement input of the ADC includes a square wave signal with a constant frequency, a direct-current signal at a constant logical level, and an analog output of the feedback DAC; a measurement selection module, configured to provide a measured digit in a digital output to a separately selected source cell, and provide remaining digits in the digital output to remaining source cells, where the measured digit is a flippable digit, and the remaining digits are non-flipping digits; and a measurement module, configured to measure an amplitude of the digital output based on the digital output. One flipping digit in the digital output is the measured digit, and the remaining digits are the non-flipping digits, so that the measurement selection module may separately select one source cell to receive the measured digit. In this way, a matching error of a source cell is not introduced when an error of the selected source cell is measured. In addition, the direct-current signal is at a constant level, so that error measurement is performed under a same bias condition, thereby helping improve error measurement accuracy.