Differential DCC Circuit Using Feedback for Low-Noise Phase Balance
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Solution Overview
Problem
Conventional RF communication systems face performance and signal quality issues due to the use of buffers, which can diminish duty cycle and balance of differential signals, leading to degraded second-order distortion (HD2) performance, especially when communicating differential signals like local oscillator (LO) signals over large distances.
Innovation Solution
A duty cycle correction (DCC) circuit with an analog feedback loop and cross-coupled inverters is implemented, which equalizes the duty cycles of differential signals and introduces minimal delay to correct timing errors, thereby minimizing phase noise and suppressing HD2 by ensuring the signals have equal duty cycles and a 180-degree phase difference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If buffers are used to communicate differential signals over large distances, then signal delivery is achieved, but duty cycle and balance are diminished leading to degraded HD2 performance
Solution Approach 1:
The patent implements a duty cycle correction (DCC) circuit with an analog feedback loop that continuously monitors the duty cycle of differential signals and adjusts the signal to correct any deviations. The feedback mechanism compares the actual duty cycle against the target 50% duty cycle and applies corrective action through the analog loop, thereby maintaining accurate duty cycle despite long transmission distances through multiple buffer stages.
2Length of moving object
If buffers are used to transmit differential signals, then signal delivery over distance is enabled, but phase noise increases and HD2 performance degrades
Solution Approach 1:
The analog feedback loop in the DCC circuit continuously monitors and corrects phase and duty cycle deviations, preventing phase noise accumulation. By maintaining precise 180-degree phase difference between differential signals through feedback control, the system suppresses HD2 performance degradation that would otherwise occur over long transmission distances.
3Duration of action of stationary object
If conventional buffer stages are used, then signal transmission is maintained, but duty cycle equality between differential signals is lost
Solution Approach 1:
The DCC circuit employs an analog feedback mechanism that continuously monitors the duty cycles of both differential signals and applies corrective action to maintain equality. The feedback loop detects duty cycle imbalances introduced by buffer stages and adjusts the signals in real-time to restore 50% duty cycle equality, thereby preserving signal integrity throughout continuous transmission.
4Manufacturing precision
If duty cycle correction is implemented through analog feedback loop, then duty cycle accuracy is improved, but circuit complexity increases
Solution Approach 1:
The patent replaces complex digital duty cycle correction mechanisms with an analog feedback loop that continuously adjusts the differential signals. This analog approach achieves high duty cycle accuracy without requiring complex digital processing, counters, or state machines, thereby improving precision while maintaining relatively simple circuit implementation.
Data Source
AI summary
A duty cycle correction (DCC) circuit for use in relation to differential signal communications, a method of providing duty cycle correction, and communications systems and methods employing same, are disclosed herein. In one example embodiment, the circuit includes a differential signal inverter circuit including first and second inverter circuits, each of which has a respective inverter and respective first and second transistor devices respectively coupled between the respective inverter and first and second voltages, respectively. The circuit also includes a feedback circuit coupled to respective output ports of the respective first and second inverter circuits and also to respective feedback input ports of the respective transistor devices. The feedback circuit operates to provide one or more feedback signals causing one or more of the transistor devices to perform current limiting. Respective duty cycles of output signals respectively are equal or substantially equal based on the current limiting.