Feedback Delay Circuit for Stable DRAM Timing

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Solution Overview

Problem

Existing delay circuits in semiconductor components, particularly in DRAM, face significant challenges in maintaining accurate delay time due to variations in power supply voltage, operating temperature, and manufacturing process, leading to inconsistent performance.

Innovation Solution

A control circuit and delay circuit design that incorporates a potential generation circuit and feedback loops to adjust the substrate potential of transistors within the delay unit, compensating for changes in power supply voltage, temperature, and manufacturing process, thereby stabilizing the delay time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional delay circuit is used, then the delay time T changes significantly with power supply voltage, operating temperature, and manufacturing process, but the circuit structure remains simple

Engineering Contradiction:
Improvedelay time stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the delay unit outputs a delayed signal that is fed back to the potential generation circuit. This feedback signal triggers potential adjustment when the delayed signal transitions, creating a closed-loop system that automatically compensates for delay time variations caused by voltage, temperature, and process changes

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the substrate potential of transistors in the delay unit by changing the potential generation circuit's output based on feedback. This parameter change approach modifies the electrical characteristics of the delay circuit to compensate for environmental variations, maintaining stable delay time without requiring complex circuit restructuring

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the delay time is made insensitive to parameter changes, then the delay time stability improves, but the control circuit complexity increases

Engineering Contradiction:
Improvedelay time accuracyVSAvoidcontrol circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The delay circuit performs self-adjustment through the feedback mechanism. When the delayed signal transitions, it automatically triggers the potential generation circuit to adjust substrate potentials, compensating for delay variations without requiring external control inputs or additional control signals

Inventive Principle:
Principle #25Self-service

3Reliability

If feedback loops and potential generation circuits are added, then delay time stability across varying conditions improves, but the circuit complexity increases

Engineering Contradiction:
Improveperformance consistencyVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the potential generation circuit with the delay unit by sharing the substrate connection. The potential generation circuit is integrated such that it directly controls the substrate potential of the delay unit transistors, reducing the need for separate control structures and minimizing overall circuit complexity while maintaining performance consistency

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11887652B2Control circuit and delay circuit
Publication Date: 2024.01.30 CHANGXIN MEMORY TECH INC
  • US11887652B2 patent drawing
  • US11887652B2 patent drawing
  • US11887652B2 patent drawing

AI summary

Provided are a control circuit and a delay circuit. The control circuit includes a control unit, a first feedback unit, and a second feedback unit. The first feedback unit outputs a first feedback signal according to a voltage of the control unit and a first reference voltage. The second feedback unit outputs a second feedback signal according to a voltage output by the first feedback unit and a second reference voltage. The control unit is configured to adjust a voltage of the second terminal of the control unit according to the first feedback signal and adjust a voltage of a third terminal of the control unit according to the second feedback signal, to make a change value, changing along with a first parameter, of a current of the control unit be within a first range.