Feedback Field-Effect Device for Bidirectional Parallel Operation
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Solution Overview
Problem
Conventional memory devices struggle with bidirectional parallel operation and synapse plasticity, limiting their integration and power efficiency, especially in neuromorphic applications where high-speed learning and low power consumption are crucial.
Innovation Solution
A feedback field-effect electronic device with a diode structure, utilizing two independent gate electrodes and access transistors for row-direction and column-direction access, enabling bidirectional parallel operation and synapse plasticity, fabricated using a CMOS process for improved integration and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional memory devices are used, then fabrication process is simple, but bidirectional parallel operation cannot be performed and synapse plasticity implementation is difficult
Solution Approach 1:
The memory device is segmented into multiple independent gate electrodes (first gate electrode and second gate electrode) that can independently control different access directions. This segmentation allows row-direction and column-direction access to be controlled separately, enabling bidirectional parallel operation while maintaining manageable device complexity through modular control structures.
Solution Approach 2:
The memory device is designed with multi-functional capabilities by incorporating multiple gate electrodes that can perform different functions: one gate electrode controls row-direction access while another controls column-direction access. This universal design allows the same device structure to support both bidirectional parallel operation and synapse plasticity implementation, resolving the contradiction between versatility and complexity.
2Adaptability or versatility
If 8T-SRAM is used to achieve bidirectional parallel operation and synapse plasticity, then functionality is improved, but degree of integration is limited due to eight transistors per memory cell
Solution Approach 1:
The invention merges multiple functions into a reduced transistor structure by combining the control functions of row and column access into fewer transistors compared to 8T-SRAM. The feedback loop mechanism integrates memory storage and access control functions, reducing the total transistor count per memory cell while maintaining bidirectional parallel operation and synapse plasticity capabilities.
Solution Approach 2:
A feedback loop mechanism is implemented to enable synapse plasticity and bidirectional parallel operation with fewer transistors. The feedback loop allows the device to maintain state information and control access directions through regenerative feedback, eliminating the need for additional transistors that would otherwise be required to maintain state and control multiple access paths independently.
3Reliability
If feedback loop memory mechanism is used, then switching characteristics and low operation voltage are improved, but bidirectional parallel operation and synapse plasticity cannot be implemented
Solution Approach 1:
The device structure employs asymmetric gate electrode configurations where the first gate electrode and second gate electrode are positioned and connected differently to enable distinct row-direction and column-direction access paths. This asymmetric design allows the feedback loop mechanism to support bidirectional parallel operation and synapse plasticity while maintaining excellent switching characteristics and low operation voltage through the inherent feedback regulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves high-speed learning with reduced arithmetic delay and low power consumption by enabling bidirectional parallel operation and synapse plasticity, enhancing the integration and performance of synapse array devices in neuromorphic networks.
Implementation Method 1
feedback field-effect electronic device capable of controlling row-direction access and column-direction access by connecting two access transistors to a feedback field-effect transistor using two independent gate electrodes
Data Source
AI summary
The present disclosure discloses a transposable feedback field-effect electronic device and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the feedback field-effect electronic device may include a diode structure, a plurality of gate electrodes, and a plurality of access electronic devices, wherein, when the diode structure receives voltage through a first gate electrode of the gate electrodes and a first access electronic device of the access electronic devices, first direction access may be performed, and when the diode structure receives voltage through a second gate electrode of the gate electrodes and a second access electronic device of the access electronic devices, second direction access may be performed.