Distributed Feedback Inverter Chain for ISI Reduction

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Solution Overview

Problem

Signal degradation and errors, such as inter symbol interference (ISI), occur when scaling up signal strength in semiconductor devices using inverter chains.

Innovation Solution

Introduce a feedback path into the inverter chain to reduce signal errors, utilizing multiple feedback paths distributed throughout the chain to improve signal quality and reduce ISI.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If inverter chains are used to scale up signal strength, then signal degradation is reduced, but signal errors such as inter symbol interference increase

Engineering Contradiction:
Improvesignal strengthVSAvoidsignal error rate
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent introduces feedback paths that tap into intermediate nodes of the inverter chain and feed signals back to earlier stages. This feedback mechanism corrects signal distortions and reduces inter-symbol interference while maintaining the signal strength scaling provided by the inverter chain

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent divides the inverter chain into multiple stages with intermediate feedback taps at specific nodes. By segmenting the feedback injection points, the system can correct errors at different stages of signal degradation, improving overall signal reliability without sacrificing strength scaling

Inventive Principle:
Principle #1Segmentation

2Reliability

If feedback paths are added to reduce signal errors, then signal quality improves, but device complexity increases

Engineering Contradiction:
Improvesignal qualityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The feedback paths are designed to serve multiple functions: they correct inter-symbol interference, maintain signal integrity across different data rates, and work effectively with various inverter chain configurations. This multi-functionality reduces the need for additional specialized circuits

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If distributed feedback is implemented throughout the inverter chain, then signal errors are reduced, but silicon area increases

Engineering Contradiction:
Improvesignal error reductionVSAvoidsilicon area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements feedback taps at specific localized nodes within the inverter chain where signal degradation characteristics change. By placing feedback injection points only at critical stages rather than uniformly throughout, the system achieves effective error reduction with minimal additional silicon area

Inventive Principle:
Principle #3Local quality

4Strength

If inverter chains are used for signal scaling, then signal strength increases, but power consumption increases

Engineering Contradiction:
Improvesignal strengthVSAvoidpower consumption
Core Design Contradiction:
StrengthVSUse of energy by moving object

Solution Approach 1:

The feedback paths enable the system to achieve the same signal strength scaling with fewer inverter stages by correcting signal degradation mid-chain. This reduces the total number of inverters required, thereby lowering overall power consumption while maintaining the desired output signal strength

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12574018B2Distributed feedback in scale up signal paths
Publication Date: 2026.03.10 MICRON TECHNOLOGY INC
  • US12574018B2 patent drawing
  • US12574018B2 patent drawing
  • US12574018B2 patent drawing

AI summary

A device includes a signal path including a plurality of inverters connected in series, which comprises a first inverter having a first input and a having first output, a second inverter having a second input coupled to the first output of the first inverter and having a second output, and a third inverter having a third input coupled to the second output of the second inverter and having a third output. The device also includes a first feedback path connecting the second output of the second inverter to the first input of the first inverter, the first feedback path including a fourth inverter and a second feedback path connecting the third output of the third inverter to the second input of the second inverter, the second feedback path including a fifth inverter.