Feedback Level Shifter Circuit for Faster Voltage Conversion

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Solution Overview

Problem

Digital logic circuits with different supply voltages require effective voltage conversion to ensure compatibility, and existing level shifters often suffer from signal delay and inefficiency in transferring input signals to higher voltage levels.

Innovation Solution

A circuit arrangement comprising a first level shifter, an output stage with a transistor, and a feedback circuit that receives an input signal of a first voltage level, provides a level-shifted signal of a higher voltage level, and feeds back the output signal to the level shifter, utilizing capacitive or resistive components to achieve dynamic operation and reduced signal delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional level shifter is used to transfer signals from lower voltage to higher voltage, then voltage level conversion is achieved, but signal delay increases and efficiency decreases

Engineering Contradiction:
Improvesignal transfer speedVSAvoidsignal delay
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent implements a feedback circuit that feeds back the output signal to the output of the first level shifter. This feedback mechanism allows the circuit to dynamically adjust and compensate for signal delays, thereby reducing the overall signal delay while maintaining accurate voltage level conversion. The feedback loop enables real-time correction of timing discrepancies that occur during level shifting operations.

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If voltage conversion is implemented between different supply voltages, then compatibility between circuits is achieved, but signal delay and inefficiency occur

Engineering Contradiction:
Improvecircuit compatibilityVSAvoidsignal transfer efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent employs dynamic operation modes including sleep mode and active mode to optimize circuit performance. In active mode, the level shifter operates at full speed for high-efficiency signal transfer. In sleep mode, power consumption is reduced while maintaining circuit compatibility. This dynamic adaptation allows the circuit to maintain high productivity during active operation while preserving voltage level compatibility across different operating conditions.

Inventive Principle:
Principle #15Dynamics

3Speed

If a feedback circuit is added to reduce signal delay, then signal transfer speed improves, but device complexity increases

Engineering Contradiction:
Improvesignal transfer speedVSAvoidcircuit structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent integrates the feedback circuit with the existing level shifter architecture by combining multiple functions into shared components. The feedback path utilizes existing transistors and routing structures where possible, merging the feedback functionality with the forward signal path. This integration approach reduces the additional complexity that would result from completely separate feedback circuitry, achieving improved signal speed with minimal increase in overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7750687B2Circuit arrangement comprising a level shifter and method
Publication Date: 2010.07.06 INFINEON TECHNOLOGIES AG
  • US7750687B2 patent drawing
  • US7750687B2 patent drawing
  • US7750687B2 patent drawing

AI summary

A circuit arrangement includes a first level shifter, an output stage, and a feedback circuit. The first level shifter is coupled to receive an input signal having a first voltage level from an input terminal, and is configured to provide a level-shifted signal having a second voltage level higher than the first voltage level. The output stage includes a first transistor that has a control terminal operably coupled to an output of the first level shifter. The output stage is configured to provide at an output terminal of the output stage an output signal based on the level-shifted signal. The feedback circuit is configured to feed back the output signal to the output of the first level shifter.