Feedback-Loop TDC Circuit for Wider PLL Phase Measurement
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Solution Overview
Problem
Conventional phase detectors in PLLs have limited dynamic range and response speed, posing challenges in applications requiring high precision and rapid phase alignment.
Innovation Solution
A power-efficient and area-efficient TDC circuit is designed with multiple serially-coupled delay units, incorporating a feedback loop and a counter that increments based on toggle signals, and includes both high-resolution and low-resolution TDCs to extend dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional phase detectors are used in PLLs, then the circuit is simple, but the dynamic range and response speed are limited
Solution Approach 1:
The TDC circuit is divided into multiple delay units (first delay unit, second delay unit, third delay unit) that are serially coupled. Each delay unit contributes to the overall dynamic range, allowing the system to measure larger time differences by combining the delays of multiple units rather than using a single complex phase detector.
Solution Approach 2:
The patent introduces a feedback loop that feeds the output of the final delay unit back to the input of the first delay unit. This creates a circular time-domain measurement space, effectively extending the dynamic range beyond what a linear chain of delay units could achieve alone, by utilizing multiple passes through the delay chain.
2Measurement precision
If Vernier TDC circuit is used to measure phase difference, then the measurement capability is improved, but the chip area and power consumption increase
Solution Approach 1:
The delay units serve multiple functions: they provide time delay for measurement, generate toggle signals for the counter, and participate in the feedback loop for extending dynamic range. This multi-functionality reduces the need for separate dedicated components, thereby reducing overall chip area.
Solution Approach 2:
The TDC circuit uses its own internal delay units and toggle signals to perform the measurement function. The counter increments based on toggle signals generated by the delay units themselves, eliminating the need for external measurement equipment or additional complex circuitry.
3Measurement precision
If Vernier TDC circuit is used to measure phase difference, then the measurement capability is improved, but the power consumption increases
Solution Approach 1:
The feedback loop creates periodic toggling of the delay units. The counter increments periodically based on toggle signals, and the system can reset and reuse the same delay units for multiple measurements. This periodic operation allows the circuit to maintain measurement capability while consuming power only during active measurement intervals rather than continuously.
4Speed
If conventional phase detectors are used, then the circuit is simple, but the response speed is limited
Solution Approach 1:
The patent replaces the conventional analog phase detector mechanism with a digital time-to-digital conversion approach. By converting the phase difference measurement into a time delay measurement that can be counted digitally, the system achieves faster response speeds suitable for modern high-speed communication applications.
Data Source
AI summary
A time-to-digital converter (TDC) circuit including serially-coupled delay units is disclosed. A feedback loop is coupled between a final delay unit of the serially-coupled delay units and an input to the serially-coupled delay units. A counter with a clock input is coupled to an output of the final delay unit. A value of the counter is to be incremented responsive to the counter receiving a toggle signal from the final delay unit.