Feedthrough Buffer Planning for Abutted IC Floorplans
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In integrated circuit design, channel-less floorplans with fully abutted partitions pose challenges for top-level design teams in coordinating logical design into physical implementation, particularly in managing port connections between modules, which is tedious and time-consuming, especially with multiple identical instantiations.
Innovation Solution
A method and system that group paths (nets) into mutually exclusive families and try out simpler path combinations to find consistent design solutions, adding fewer ports and nets, while ensuring practical implementation time, by identifying and generating feedthrough ports across intermediate modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If partitions are fully abutted with no channels between them, then routing resources are reduced and area is optimized, but coordinating port connections between partitions becomes tedious and time-consuming
Solution Approach 1:
The system performs preliminary action by automatically generating feedthrough port assignments and connection coordinates during the floorplanning stage, before physical implementation. This pre-coordination of port connections across abutted partitions eliminates the tedious manual coordination that would otherwise be required during later design stages, while maintaining the area efficiency of channel-less floorplans.
2Adaptability or versatility
If multiple identical instantiations of partitions are used, then design reuse is improved, but the complexity of coordinating port connections across all instantiations increases
Solution Approach 1:
The system applies universality by creating a single feedthrough port assignment template that can be automatically instantiated across multiple identical partition copies. The tool generates consistent port connection coordinates for all instantiations of a partition type, allowing the same coordination logic to serve multiple functions across the entire chip design, thereby reducing overall coordination complexity while maximizing design reuse.
3Manufacturing precision
If manual coordination of port connections is performed, then design accuracy can be maintained, but the process is tedious and time-consuming
Solution Approach 1:
The system implements self-service by automatically generating feedthrough port assignments, connection coordinates, and netlist updates without requiring manual intervention. The tool self-coordinates port connections across partitions by analyzing the floorplan geometry and automatically determining optimal connection points, thereby maintaining design accuracy through systematic algorithms while dramatically increasing design speed compared to manual coordination methods.
Data Source
AI summary
A method and a system are provided for planning feedthrough ports on a floorplan for an integrated circuit. In one example, the system groups paths (e.g., nets) into mutually exclusive families of paths (e.g., nets). The system analyzes the simpler path combinations for each path family. Advantageously, the system can find consistent design solutions for paths (e.g., nets), while adding fewer ports and fewer nets, within a practical amount of time.