Feedthrough Multilayer Capacitor Noise Reduction
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Solution Overview
Problem
Conventional feedthrough multilayer capacitor arrays do not effectively eliminate both common-mode and differential-mode noise, and they have high equivalent series inductance due to the lack of opposing signal inner electrodes and grounding inner electrodes.
Innovation Solution
A feedthrough multilayer capacitor array design that includes multiple signal and grounding inner electrodes with opposing portions separated by insulator layers, allowing for the formation of capacitors that eliminate both common-mode and differential-mode noise, while reducing equivalent series inductance by increasing current flow paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional feedthrough multilayer capacitor arrays are used with only signal and grounding inner electrodes, then the structure is simple, but both common-mode noise and differential-mode noise cannot be eliminated effectively
Solution Approach 1:
The capacitor array is segmented into multiple functional regions with different electrode configurations. First and second signal inner electrodes are separated and independently connected to different terminal electrodes, allowing distinct capacitance paths for common-mode and differential-mode noise elimination. This segmentation enables simultaneous suppression of both noise types without complicating the overall manufacturing process.
Solution Approach 2:
The capacitor array structure is designed to perform multiple functions: eliminating common-mode noise through capacitance between signal and grounding electrodes, and eliminating differential-mode noise through capacitance between opposing signal electrodes. This multi-functionality is achieved within a single integrated structure that maintains manufacturing simplicity while addressing both noise elimination requirements.
2Device complexity
If signal inner electrodes do not oppose each other while holding insulator layers, then the structure is simpler, but equivalent series inductance is high
Solution Approach 1:
The electrode arrangement transitions from a single-plane configuration to a multi-dimensional stacked structure. First and second signal inner electrodes are positioned in different layers, opposing each other while holding insulator layers therebetween. This dimensional arrangement creates additional current flow paths and reduces equivalent series inductance without significantly increasing manufacturing complexity, as the stacked configuration follows standard multilayer capacitor fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively eliminates common-mode and differential-mode noise and reduces equivalent series inductance, enabling efficient noise reduction and improved capacitor characteristics.
Implementation Method 1
the first signal inner electrode and second grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the plurality of insulator layers
Implementation Method 2
the second signal inner electrode and first grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the plurality of insulator layers
Implementation Method 3
the first and second signal inner electrodes include respective portions opposing each other while holding therebetween at least one of the plurality of insulator layers
Data Source
AI summary
A feedthrough multilayer capacitor mounting structure including a capacitor body, at least two each of first and second signal terminal electrodes, and at least one each of first and second grounding terminal electrodes. The capacitor body has a plurality of insulator layers laminated, a first signal inner electrode connected to two first signal terminal electrodes, a second signal inner electrode connected to two second signal terminal electrodes, a first grounding inner electrode connected to one first grounding terminal electrode, and a second grounding inner electrode connected to one second grounding terminal electrode. The first signal inner electrode and second grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the insulator layers. The second signal inner electrode and first grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the insulator layers. The first and second signal inner electrodes include respective portions opposing each other while holding therebetween at least one of the insulator layers.