FeFET Gate Dielectric Stack for Lower Switching Barrier Endurance
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Solution Overview
Problem
Conventional ferroelectric field-effect transistors (FeFETs) face endurance issues due to their high switching barrier for oxygen movement, which affects the reliability and performance of semiconductor devices.
Innovation Solution
A semiconductor device with a gate dielectric film stack that induces antiferroelectricity is developed, utilizing a zirconium-rich HfZrO2 layer and auxiliary antiferroelectric induction layers to lower the polarization switching potential barrier and enhance endurance, allowing for easier transistor operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional ferroelectric gate dielectric film is used, then the transistor can operate with ferroelectric switching, but the switching barrier for oxygen movement is high which reduces endurance
Solution Approach 1:
The gate dielectric film is segmented into a multi-layer stack structure comprising a first HfZrO2 layer, a second HfZrO2 layer, and an intermediate layer positioned between them. This segmentation allows each layer to contribute differently to the overall functionality, with the intermediate layer specifically designed to reduce the switching barrier for oxygen movement while the HfZrO2 layers provide ferroelectric switching capability, thereby resolving the contradiction between maintaining ferroelectric operation and reducing switching barrier.
Solution Approach 2:
The gate dielectric film employs a composite material structure combining hafnium zirconium oxide (HfZrO2) with an intermediate layer material that facilitates oxygen ion transport. This composite approach allows the structure to simultaneously exhibit ferroelectric properties from the HfZrO2 layers and low switching barrier characteristics from the intermediate layer, directly addressing the endurance issue caused by high switching barriers in conventional single-material ferroelectric films.
2Reliability
If the gate dielectric film stack with antiferroelectric induction layers is implemented, then the switching barrier is reduced and endurance is improved, but the device structure becomes more complex
Solution Approach 1:
The gate dielectric film is divided into discrete functional layers (first HfZrO2 layer, intermediate layer, second HfZrO2 layer) that can be independently optimized and fabricated. This segmentation makes the complex structure more manageable in terms of manufacturing, with each layer serving a specific function that contributes to the overall improvement in endurance while maintaining controllable complexity.
Solution Approach 2:
Different regions of the gate dielectric film stack are assigned different material compositions and properties tailored to their specific functions. The intermediate layer is specifically engineered with properties that reduce the switching barrier, while the HfZrO2 layers are optimized for ferroelectric switching. This local differentiation allows the complex structure to achieve superior performance without requiring uniform complexity throughout the entire device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The antiferroelectric gate dielectric film stack improves the endurance of FeFETs by reducing the switching barrier, enabling easier transistor operation and potentially increasing the reliability and performance of semiconductor devices.
Implementation Method 1
A semiconductor device with a gate dielectric film stack that induces antiferroelectricity is developed, utilizing a zirconium-rich HfZrO2 layer and auxiliary antiferroelectric induction layers to lower the polarization switching potential barrier
Data Source
AI summary
A semiconductor device includes a first transistor. The first transistor includes a source region, a drain region, a semiconductive material layer, a gate dielectric film stack and a gate electrode. The semiconductive material layer is disposed between the source region and the drain region. The gate dielectric film stack is disposed on the semiconductive material layer and includes a first film layer, a second film layer and an intermediate film layer. The first film layer and the second film layer include hafnium. The intermediate layer is sandwiched in between the first film layer and the second film layer and includes hafnium, wherein a hafnium content of the intermediate film layer is lower than a hafnium content of the first film layer and a hafnium content of the second film layer. The gate electrode is disposed on the gate dielectric film stack.