FeFET Reservoir Computing With Switched Drain Readout
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Solution Overview
Problem
Existing semiconductor devices with ferroelectric memory cells consume high power due to constant voltage application during reading operations.
Innovation Solution
Incorporating a switch between the sense circuit and the drain to control the period of voltage application, allowing for controlled voltage application during data input and readout, and implementing multiple readout points and variable input intervals to optimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If constant voltage is applied to the drain for reading, then reliable data readout is achieved, but power consumption increases
Solution Approach 1:
The patent applies periodic voltage to the drain instead of constant voltage. A switch controls the drain voltage to be applied only during specific time periods when data input or readout is required, rather than continuously. This periodic application maintains reliable data processing while significantly reducing overall power consumption by eliminating unnecessary voltage application during idle periods
2Productivity
If voltage is applied continuously to the drain, then data processing capability is maintained, but power consumption increases
Solution Approach 1:
The patent introduces dynamic control of drain voltage through a switch that adjusts voltage application based on operational requirements. The system dynamically transitions between voltage application and disconnection states, adapting to different operational phases (data input, readout, idle) to maintain processing capability only when needed while reducing power consumption during non-operational periods
Data Source
AI summary
Control the period during which voltage is applied to the drain to provide a reservoir computer with low power consumption. A reservoir computer is provided, comprising an FeFET with a drain connected to a sense circuit that applies a drain voltage and detects the drain current by converting it from analog to digital. The gate electrode is connected to a gate voltage generation circuit that inputs a gate voltage in the form of a triangular wave with peaks of positive and negative voltages. Additionally, it includes a first switch positioned between the sense circuit and the drain. The gate voltage generation circuit comprises a charge pump circuit for applying positive voltage, a charge pump circuit for applying negative voltage, a pulse generation circuit, and a Vref regulator.