FeFET Latch Circuit for Nonvolatile Data Retention With Low Leakage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing influence of leakage current in system-on-chip (SoC) devices, particularly in Internet-of-things (IoT) apparatuses, due to lowered driving and threshold voltages, necessitates a reduction in leakage current in the turned-off state to extend standby time without excessive power consumption.
Innovation Solution
A nonvolatile memory device and latch design incorporating a ferroelectric field effect transistor (FeFET) with a pull-up and pull-down transistor, where the FeFET's electrodes are connected to the transistors, and a restore transistor, allowing for data storage in a nonvolatile manner with reduced power consumption by utilizing low and high resistance states based on ferroelectric layer polarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If driving voltage and threshold voltage are lowered to improve integration degree, then power consumption during operation is reduced, but leakage current in turned-off state increases
Solution Approach 1:
The patent changes the physical state of the memory element by using a ferroelectric layer that can maintain polarization states (upward or downward) without continuous power supply. This allows the system to transition from volatile to non-volatile operation, eliminating leakage current while maintaining low operating power through the FeFET's unique electrical characteristics.
Solution Approach 2:
The patent replaces conventional transistor-based memory storage with a ferroelectric field effect transistor (FeFET) that uses ferroelectric polarization to store data. This substitution eliminates the need for continuous refreshing and reduces leakage current by utilizing the ferroelectric material's ability to maintain stable polarization states without power consumption in the turned-off state.
2Device complexity
If conventional volatile memory is used to reduce circuit complexity, then standby time is limited due to continuous power consumption, but nonvolatile memory increases circuit complexity
Solution Approach 1:
The FeFET structure serves multiple functions: it acts as both the memory storage element (through ferroelectric polarization) and the switching element (through gate control). This multi-functionality reduces the need for separate refresh circuits and control logic, thereby reducing overall circuit complexity while enabling non-volatile operation and extended standby time.
Solution Approach 2:
The patent merges the memory storage function and the transistor switching function into a single FeFET structure. The ferroelectric layer is integrated directly into the transistor gate, combining what would traditionally be separate components (memory cell and transistor) into one unified structure, thereby reducing circuit complexity while achieving non-volatile memory functionality.
3Loss of energy
If FeFET with pull-up and pull-down transistors is used for nonvolatile storage, then leakage current is reduced and standby time extended, but device structure becomes more complex
Solution Approach 1:
The ferroelectric layer in the FeFET structure provides self-service by automatically maintaining its polarization state without external intervention or refresh circuits. The pull-up and pull-down transistors work together with the ferroelectric layer to self-correct and maintain stable logic states, reducing the need for additional control circuitry and minimizing overall device complexity despite the enhanced functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables data storage and restoration with minimal power consumption and maintains data in a nonvolatile state, reducing die area requirements and extending device standby time.
Implementation Method 1
utilizing low and high resistance states based on ferroelectric layer polarization
Data Source
AI summary
A nonvolatile memory device according to the embodiment includes: a first inverter; and a second inverter cross-coupled to the first inverter, wherein the second inverter includes a pull-up transistor, a pull-down transistor, and a ferroelectric field effect transistor having gate nodes connected to each other, and a restore transistor having one electrode connected to the ferroelectric field effect transistor, and the second inverter stores data in a nonvolatile manner.