FeFET Mixed Layer Structure for a Larger Memory Window
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Solution Overview
Problem
Existing ferroelectric field effect transistors (FeFETs) face challenges in maximizing the memory window (MW), which is determined by the ratio of capacitances in the metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structure, and the capacitance of the MFM capacitor needs to be reduced to enhance this parameter.
Innovation Solution
A semiconductor device is designed with a mixed layer comprising a discontinuous ferroelectric and a low-k dielectric material, where the ferroelectric is grown discontinuously on a 2D material layer, and a low-k dielectric is filled between regions of the ferroelectric, reducing the capacitance of the MFM capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuous ferroelectric layer is used in the MFMIS structure, then the ferroelectric field effect is strong, but the capacitance of the MFM capacitor is high which reduces the memory window
Solution Approach 1:
The ferroelectric layer is segmented into discontinuous regions rather than being continuous. The mixed layer includes discontinuous ferroelectric regions surrounded by low-k dielectric material, which reduces the overall capacitance of the MFM capacitor while maintaining sufficient ferroelectric field effect for memory operation. This segmentation directly addresses the contradiction by lowering capacitance to increase memory window.
Solution Approach 2:
The patent creates a composite structure called a mixed layer that combines discontinuous ferroelectric material with low-k dielectric material. This composite structure achieves both reduced capacitance (from the low-k dielectric) and maintained ferroelectric functionality (from the discontinuous ferroelectric regions), resolving the contradiction between capacitance reduction and ferroelectric effect strength.
2Reliability
If the capacitance of the MFM capacitor is reduced to increase memory window, then the memory characteristics improve, but the ferroelectric field effect may be weakened
Solution Approach 1:
The ferroelectric material is positioned strategically in specific local regions (discontinuous regions) within the mixed layer, rather than being uniformly distributed. This local placement ensures that the ferroelectric field effect is concentrated where needed for memory operation, while the surrounding low-k dielectric material provides capacitance reduction without compromising the local ferroelectric functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reduced capacitance of the MFM capacitor increases the memory window of the FeFET, enhancing its memory characteristics and performance.
Implementation Method 1
Ferroelectrics are materials exhibiting ferroelectricity, wherein spontaneous polarization is achieved by aligning the internal electric dipole moments of the material such that, even when no electric field is applied thereto from the outside, the internal electric dipole moments remain aligned.
Data Source
AI summary
Provided are a semiconductor device, a method of manufacturing the semiconductor device, and a memory device including the semiconductor device. The semiconductor device includes a channel layer, an insulating layer on the channel layer, an intermediate electrode on the insulating layer, a mixed layer provided on the intermediate electrode and including a discontinuous ferroelectric and a low-k dielectric material filled between regions of the discontinuous ferroelectric, the low-k dielectric material having a dielectric constant less than a dielectric constant of the discontinuous ferroelectric, a gate electrode on the mixed layer, and a two-dimensional (2D) material layer provided in at least region selected from a region between the intermediate electrode and the mixed layer and a region between the gate electrode and the mixed layer.