FeFET Memory Using Random Ferroelectric Polarization for Linear Synapses
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Solution Overview
Problem
Conventional ferroelectric-based non-volatile memory (NVM) synapses exhibit nonlinear responses to training pulses, leading to accuracy issues in machine learning applications, particularly as the dimensions of input and output vectors increase, necessitating a solution for improved linearity and symmetry in response.
Innovation Solution
A ferroelectric film with random polarization directions is used to create ferroelectric field-effect transistors (FeFETs) and tunnel junctions (FTJs) that have multiple programmable threshold voltage or resistance values, enabling analog non-volatile memory devices suitable for AI/ML applications by employing a doped hafnium oxide film with specific grain structures and programming voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ferroelectric-based NVM synapse is used, then the device structure is simple and manufacturing is easier, but the response to training pulses is nonlinear leading to accuracy issues in ML applications
Solution Approach 1:
The patent applies local quality by creating a poly ferroelectric film where different grains have different polarization directions (some upward, some downward). This local variation in polarization orientation within the film structure enables multiple stable states with linear response characteristics, resolving the contradiction between maintaining simple device structure and achieving accurate ML computations.
Solution Approach 2:
The invention uses a composite poly ferroelectric film structure combining multiple grains with different polarization orientations. This composite material approach allows the device to exhibit both simple overall structure and complex internal states, achieving linear response and high accuracy in ML applications while maintaining manufacturing feasibility.
2Ease of operation
If conventional ferroelectric NVM synapse with single polarization direction is used, then the device structure is simpler, but the response symmetry to training pulses is poor
Solution Approach 1:
By introducing local quality variations through different grain polarization directions (upward and downward) within the ferroelectric film, the device achieves symmetric response to positive and negative training pulses. This local diversity in polarization orientation compensates for the simplicity of the overall device structure, enabling operationally symmetric behavior.
3Measurement precision
If ferroelectric film with random polarization directions is used, then multiple programmable states and linear response are achieved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent employs self-service by utilizing the natural formation of poly ferroelectric grains with random polarization directions during the deposition process. Rather than requiring external control mechanisms to set each grain's polarization, the material self-organizes into the desired multi-state structure through standard fabrication processes, achieving linear response without excessive manufacturing precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of ferroelectric films with random polarization directions allows for a smooth, continuous response, enhancing the accuracy and efficiency of AI/ML computations by providing multiple programmable states, thus overcoming the nonlinear response limitations of conventional ferroelectric NVM synapses.
Implementation Method 1
a ferroelectric layer over the internal metal layer... a plurality of grains that have random polarization directions
Implementation Method 2
employing a doped hafnium oxide film with specific grain structures
Data Source
AI summary
A semiconductor device includes a ferroelectric field-effect transistor (FeFET), wherein the FeFET includes a substrate; a source region in the substrate; a drain region in the substrate; and a gate structure over the substrate and between the source region and the drain region. The gate structure includes a gate dielectric layer over the substrate; a ferroelectric film over the gate dielectric layer; and a gate electrode over the ferroelectric film.


