FeRAM Capacitor Electrode Structure for Leak Current Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Ferroelectric random access memory (FeRAM) capacitors with stack-type structures face high leak current issues due to iridium grains redeposited onto the side surfaces of the capacitor dielectric film during etching, which affects the reliability and integration of the memory devices.

Innovation Solution

The semiconductor device incorporates a capacitor structure with a first and second conductive metal oxide film, where the second conductive metal oxide film has a higher oxidation ratio than the first, reducing hydrogen generation and catalytic action, and a conductive cover film made of platinum-group elements except for iridium, which prevents iridium grains from being released into the etching atmosphere, thereby minimizing leak paths and enhancing remanent polarization charge.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an iridium-based upper electrode is used in FeRAM capacitors, then the capacitor exhibits good ferroelectric characteristics and adhesion, but iridium grains are released during etching and redeposited on the side surfaces of the capacitor dielectric film, causing high leak current

Engineering Contradiction:
Improveferroelectric characteristicsVSAvoidiridium grain redeposition
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The upper electrode is divided into multiple functional layers: an iridium oxide film (first conductive film) as the base layer providing ferroelectric interface compatibility, and a platinum film (second conductive film) as the upper layer that prevents iridium grain release during etching. This segmentation allows each layer to perform its specific function independently, resolving the contradiction between achieving good ferroelectric characteristics and preventing harmful grain redeposition.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The platinum film acts as an intermediary protective layer between the iridium oxide film and the etching environment. During etching, the platinum film prevents direct contact between the etchant and iridium grains, thereby preventing iridium grain release and redeposition on the capacitor dielectric film, while still allowing the underlying iridium oxide film to maintain good ferroelectric characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If a single-layer iridium oxide film is used as the upper electrode, then the manufacturing process is simple, but the film exhibits catalytic action that generates hydrogen and deteriorates the capacitor dielectric film

Engineering Contradiction:
Improveprocess simplicityVSAvoidhydrogen generation
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The upper electrode is segmented into two layers: the iridium oxide film maintains the simple manufacturing process and good ferroelectric interface, while the additional platinum film layer specifically addresses the hydrogen generation issue by providing a non-catalytic surface that prevents hydrogen evolution during subsequent processing steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The composition and oxidation state of the iridium oxide film are optimized to reduce catalytic activity, and a platinum film is added on top to further suppress hydrogen generation. This parameter change in material composition and structure eliminates the harmful catalytic effect while preserving the ease of manufacture through standard sputtering processes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the upper electrode structure is optimized for compatibility with the ferroelectric film, then the ferroelectric characteristics improve, but the structure becomes more complex with multiple layers

Engineering Contradiction:
Improveferroelectric characteristicsVSAvoidupper electrode structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The upper electrode is segmented into two functional layers with distinct roles: the iridium oxide film (first conductive film) directly interfaces with the ferroelectric capacitor dielectric film to ensure compatibility and good ferroelectric characteristics, while the platinum film (second conductive film) provides protective and conductive functions. This segmentation achieves optimized ferroelectric performance without excessive complexity, as both layers can be formed using standard sputtering processes.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces leak current and improves the ferroelectric characteristics of the capacitor, enabling better integration and reliability of FeRAM devices by preventing iridium grain redeposition and hydrogen-induced deterioration.

Implementation Method 1

the second conductive metal oxide film has a higher oxidation ratio than the first, reducing hydrogen generation and catalytic action

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

a conductive cover film made of platinum-group elements except for iridium, which prevents iridium grains from being released into the etching atmosphere

Methodology Applied
Scientific EffectPhysical barrier: Physical Containment

Data Source

PatentUS7592657B2Semiconductor device and method of manufacturing the same
Publication Date: 2009.09.22 FUJITSU SEMICON MEMORY SOLUTION LTD
  • US7592657B2 patent drawing
  • US7592657B2 patent drawing
  • US7592657B2 patent drawing

AI summary

According to the present invention, a method of fabricating a semiconductor device is provided including forming a first interlayer insulating film 11, a crystalline conductive film 21, a first conductive film 23, a ferroelectric film 24 and a second conductive film 25 on a silicon substrate 1 in sequence, forming a conductive cover film 18 on the second conductive film 25, forming a hard mask 26a on the conductive cover film 18, forming a capacitor upon etching the conductive cover film 18, the second conductive film 25, the ferroelectric film 24 and the first conductive film 23 using the hard mask 26a as an etching mask in areas exposed from the hard mask 26a, and etching the hard mask 26a and the crystalline conductive film 21 exposed from the lower electrode 23a using an etching condition under which the hard mask 26a is etched.