FeRAM Capacitor 3D Hole Structure for High Capacitance
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Solution Overview
Problem
The existing FeRAM technology faces challenges in increasing the capacitance per unit area of ferroelectric capacitors, which affects the size of the memory window and operation reliability.
Innovation Solution
A semiconductor storage device is designed with a field-effect transistor, interlayer insulation film, source contact, and a capacitor that includes a lower electrode, ferroelectric film, and upper electrode, where the capacitor is formed within an opening in the interlayer insulation film, increasing the capacitor's area and capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capacitance per unit area of the ferroelectric capacitor is increased, then the size of the memory window increases and operation reliability improves, but the device area and manufacturing complexity increase
Solution Approach 1:
The patent transitions from a planar capacitor structure to a three-dimensional structure by forming the capacitor within a hole penetrating through the interlayer insulation film. This vertical dimensionality change allows the capacitor electrodes to extend upward from the substrate surface, significantly increasing the effective capacitance area without proportionally increasing the footprint area on the substrate.
Solution Approach 2:
The capacitor structure is nested within the hole formed in the interlayer insulation film. The first electrode, ferroelectric film, and second electrode are sequentially stacked within the confined space of the hole, creating a compact nested structure that maximizes capacitance within a limited lateral area while maintaining proper electrical isolation from surrounding circuitry.
2Quantity of substance
If the capacitor area is increased to improve capacitance, then the memory window size increases, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The capacitor is segmented into distinct functional layers: a first electrode at the bottom, a ferroelectric film in the middle, and a second electrode at the top. This segmentation allows each layer to be optimized independently for its specific function while being formed through a standardized sequential deposition process, managing complexity through modular design.
Solution Approach 2:
The hole is formed in the interlayer insulation film before the capacitor electrodes are deposited. This preliminary action creates a pre-defined template that guides the subsequent formation of the capacitor structure, ensuring proper positioning and area control without requiring complex alignment steps during electrode deposition.
3Reliability
If the ferroelectric capacitor capacitance is increased, then the operation reliability improves, but the manufacturing process complexity increases
Solution Approach 1:
The capacitor electrodes and ferroelectric film are formed through continuous sequential deposition processes without breaking the vacuum or exposing the structure to contamination. The first electrode, ferroelectric film, and second electrode are deposited in succession, maintaining a continuous useful action that improves manufacturing efficiency and reduces process complexity.
Solution Approach 2:
The hole structure in the interlayer insulation film serves multiple functions: it defines the capacitor area, provides physical support for the stacked electrodes, and automatically provides electrical isolation from the substrate and surrounding circuitry. This self-service design eliminates the need for additional complex isolation structures or alignment mechanisms.
Data Source
AI summary
A semiconductor storage device includes a field-effect transistor, an interlayer insulation film, a source contact, an opening, and a capacitor. The field-effect transistor is provided on a semiconductor substrate. The interlayer insulation film is provided on the semiconductor substrate. The source contact runs through the interlayer insulation film and is electrically coupled to a source of the field-effect transistor. The opening is provided in a region of the interlayer insulation film including the source contact and allows the source contact to project therein. The capacitor includes a lower electrode, a ferroelectric film, and an upper electrode. The lower electrode is provided along an inside shape of the opening. The ferroelectric film is provided on the lower electrode. The upper electrode is provided on the ferroelectric film to fill the opening.