Ferroelectric Metal-Insulator-Metal Capacitor Structure for Embedded Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of nonvolatile memory into integrated circuits is challenging due to the high process complexity and compatibility issues with existing logic circuit processes, particularly for floating gate-based flash memory, which requires multiple photo masks and high voltages.
Innovation Solution
A semiconductor structure and method that integrates decoupling metal-insulator-metal capacitors and ferroelectric metal-insulator-metal capacitors within a standard CMOS logic process, allowing for the formation of nonvolatile memory cells using a reduced number of photo masks and employing a three-dimensional ferroelectric metal-insulator-metal capacitor design to enhance density and reduce manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If floating gate-based flash memory cells are integrated into integrated circuits, then nonvolatile memory functionality is achieved, but process complexity increases significantly requiring more than eight additional photo masks
Solution Approach 1:
The patent segments the capacitor formation process into distinct stages: first forming a bottom electrode and first dielectric layer, then adding a second dielectric layer and top electrode. This segmentation allows different dielectric materials to be deposited in separate steps, simplifying the overall process compared to floating gate flash memory which requires multiple photo mask steps.
Solution Approach 2:
The patent creates a universal capacitor structure that can serve multiple functions: decoupling capacitors for minimizing voltage drops in CMOS logic circuits, and ferroelectric capacitors for nonvolatile memory applications. This multi-functionality eliminates the need for separate complex processing lines for different capacitor types.
2Reliability
If floating gate-based flash memory cells are provided in an integrated circuit, then nonvolatile memory is achieved, but the number of photo masks required increases to more than eight additional masks
Solution Approach 1:
The patent performs preliminary actions by depositing the bottom electrode and first dielectric layer before defining the final capacitor structure. This preliminary formation of capacitor components allows subsequent processing steps to be simplified and reduces the total number of photo masks needed compared to forming complete flash memory structures from scratch.
Solution Approach 2:
The patent transitions from two-dimensional planar capacitor structures to three-dimensional stacked capacitor structures with multiple dielectric layers and electrodes. This dimensional change increases capacitance density without requiring additional photo mask steps, thereby reducing manufacturing complexity.
3Reliability
If floating gate-based flash memory cells are integrated, then nonvolatile memory functionality is achieved, but high voltage transistors are required leading to further process issues
Solution Approach 1:
The patent changes the electrical parameters of the capacitor structure by using ferroelectric dielectric materials with high remnant polarization. This allows the capacitor to retain data at lower voltages compared to floating gate flash memory, eliminating the need for high voltage transistors and associated process complexity.
4Reliability
If other nonvolatile memory techniques such as STT-MRAM, PCM, or RRAM are used, then alternative nonvolatile memory is achieved, but issues related to technology maturity, cost and compatibility with logic circuit processes arise
Solution Approach 1:
The patent uses homogeneous processing techniques - standard semiconductor deposition and etching processes - to form ferroelectric capacitors that are compatible with existing CMOS logic circuit fabrication. This homogeneity in processing methods ensures technology maturity and cost-effectiveness while maintaining adaptability to standard logic circuit processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient integration of nonvolatile memory with reduced manufacturing complexity and cost, achieving high-density embedded ferroelectric random access memory (FRAM) applications while maintaining low leakage current and high remnant polarization.
Implementation Method 1
a layer of ferroelectric dielectric material is formed over the first electrode... The layer of ferroelectric dielectric material includes a first portion arranged between the first electrode and the second electrode of the second capacitor
Implementation Method 2
thin films of a high-k dielectric material may be employed as a capacitor dielectric to obtain a high capacitance density of the decoupling capacitors
Data Source
AI summary
An illustrative method disclosed herein includes providing a semiconductor structure. The semiconductor structure includes a first interlayer dielectric provided over a semiconductor substrate. A first electrode of a first capacitor is formed over the first interlayer dielectric. A layer of first dielectric material is deposited over the first electrode of the first capacitor and the first interlayer dielectric. A layer of electrically conductive material is deposited over the layer of first dielectric material. A second electrode of the first capacitor and a first electrode of the second capacitor are formed from the layer of electrically conductive material. After the formation of the second electrode of the first capacitor and the first electrode of the second capacitor, a layer of second dielectric material is deposited and a second electrode of the second capacitor is formed over the layer of second dielectric material.