Ferroelectric Capacitor Etching via Protective Film
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ferroelectric memories face challenges in miniaturization due to abnormal etching during high-temperature processing, which can lead to electrical conduction failures and reduced reliability, particularly affecting the second metal plug connected to the ferroelectric capacitor.
Innovation Solution
A semiconductor storage device design that includes a first metal plug connected to the ferroelectric capacitor and a second metal plug protected by an interlayer insulating film or conductive cap, preventing abnormal etching during high-temperature processing and ensuring vertical or steeply oblique side surfaces of the ferroelectric capacitor for miniaturization without compromising reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If high-temperature etching is performed to achieve vertical side surfaces for miniaturization, then the ferroelectric capacitor area is reduced, but abnormal etching occurs on the second metal plug causing electrical conduction failures
Solution Approach 1:
A protective film is introduced as an intermediary layer between the second metal plug and the etching environment. This protective film prevents direct contact between the etchant and the second metal plug during high-temperature etching, thereby preventing abnormal etching and electrical conduction failures while allowing the ferroelectric capacitor to be etched into vertical side surfaces for miniaturization.
Solution Approach 2:
The protective film is formed in advance before the high-temperature etching process. This preliminary protective action prevents the harmful effect of abnormal etching on the second metal plug before it can occur, enabling safe miniaturization of the ferroelectric capacitor without compromising electrical conduction reliability.
2Ease of manufacture
If the second metal plug is exposed during high-temperature etching, then etching can be performed, but abnormal etching occurs leading to manufacturing defects
Solution Approach 1:
The protective film serves as an intermediary barrier that allows the high-temperature etching process to proceed on the ferroelectric capacitor while preventing the etchant from attacking the second metal plug. This maintains manufacturing precision by preventing abnormal etching of the plug while preserving the feasibility of the etching process.
Solution Approach 2:
The protective film is selectively positioned to cover only the second metal plug region, while allowing the ferroelectric capacitor to be etched. This local protection approach maintains the necessary etching feasibility for the capacitor while preventing dimensional accuracy degradation of the second metal plug.
3Reliability
If conventional etching processes are used, then the second metal plug is protected, but the ferroelectric capacitor side surfaces become oblique rather than vertical
Solution Approach 1:
The protective film enables the use of high-temperature etching processes by preventing damage to the second metal plug. This intermediary protection allows the etching process to create vertical side surfaces on the ferroelectric capacitor, improving the shape from oblique to vertical while maintaining electrical conduction reliability.
Solution Approach 2:
The protective film enables changing the etching temperature parameter to high temperatures, which fundamentally alters the etching mechanism to produce vertical side surfaces instead of oblique ones. This parameter change improves the capacitor shape while the protective film ensures reliability is maintained.
Data Source
AI summary
A semiconductor storage device includes an insulating layer. A ferroelectric capacitor is on the insulating layer and includes a lower electrode, a ferroelectric film, and an upper electrode. An interlayer insulating film is formed on the insulating layer, and has an opening where the ferroelectric capacitor is disposed. A first metal plug is formed in the insulating layer and connected to the lower electrode via the opening. A second metal plug is embedded in the insulating layer outside the ferroelectric capacitor. A hydrogen barrier film covers the ferroelectric capacitor and the interlayer insulating film. An upper surface of the interlayer insulating film is higher than an upper surface of the first metal plug so that a step is therebetween. The lower electrode is formed on the upper surface of the interlayer insulating film, the upper surface of the first metal plug and the step. The upper surface of the interlayer insulating film and the upper surface of the first metal plug are interlinked via a recessed portion of the interlayer insulating film.