Ferroelectric Capacitor Negative Capacitance Subthreshold Swing
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Solution Overview
Problem
Current semiconductor technologies face challenges in reducing power density due to high subthreshold swing limitations in silicon-based MOSFETs, making it difficult to achieve low supply voltages necessary for further miniaturization and integration.
Innovation Solution
Incorporating a ferroelectric material layer in the semiconductor device's conductive connection groups to form a negative capacitance ferroelectric capacitor, which amplifies voltage and improves switching speed by reducing subthreshold swing below 60 mV/decade.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If silicon-based MOSFET is used for transistor operation, then the transistor can be manufactured with standard processes, but the subthreshold swing is limited to 60 mV/decade or more, making it difficult to achieve low supply voltage
Solution Approach 1:
The patent changes the physical parameter of the gate dielectric layer by introducing a ferroelectric material layer, which fundamentally alters the capacitance characteristics from positive to negative. This parameter change enables subthreshold swing below 60 mV/decade while maintaining compatibility with standard semiconductor manufacturing processes
Solution Approach 2:
The patent employs a composite gate dielectric structure comprising a ferroelectric material layer combined with other dielectric materials. This composite structure achieves both the desired negative capacitance effect for improved subthreshold swing and the necessary electrical properties for reliable transistor operation
2Area of moving object
If the transistor size is miniaturized to increase integration density, then the degree of integration increases, but the power density increases exponentially due to insufficient drive voltage reduction
Solution Approach 1:
By changing the gate dielectric to a ferroelectric material, the patent achieves voltage amplification through negative capacitance, enabling the transistor to operate at lower supply voltages. This parameter change directly addresses the power density issue by allowing continued miniaturization without the exponential power increase that would otherwise occur
3Reliability
If a ferroelectric material layer is introduced to achieve negative capacitance and subthreshold swing below 60 mV/decade, then voltage amplification and switching speed are improved, but the device structure and manufacturing process become more complex
Solution Approach 1:
The patent segments the gate dielectric layer into multiple functional layers, with the ferroelectric material layer positioned specifically between the gate electrode and the channel. This segmentation allows the ferroelectric layer to provide negative capacitance while other layers maintain electrical stability and interface quality, achieving improved switching speed without excessive structural complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of a ferroelectric capacitor with negative capacitance enhances voltage amplification and switching speed, enabling transistors to operate with subthreshold swing less than 60 mV/decade, thus addressing the power density and integration challenges.
Implementation Method 1
the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group
Data Source
AI summary
A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.