Ferroelectric Capacitor Sidewall Leakage Reduction
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Solution Overview
Problem
Conventional methods for forming ferroelectric capacitors in F-RAMs result in conductive residues on sidewalls, leading to high leakage paths and reduced yield due to ineffective residue removal during etching processes, which can short the electrodes and impair capacitor operation.
Innovation Solution
A non-conductive barrier is formed on the sidewalls of the ferroelectric capacitors to electrically isolate conductive residues, using etch chemistries selective to the barrier material, such as aluminum oxide or silicon nitride, to prevent residue deposition and minimize damage during the fabrication of ferroelectric random access memories (F-RAMs).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional etching processes are used to form ferroelectric capacitors, then the fabrication process can be completed, but conductive residues are deposited on sidewalls creating leakage paths and reducing device yield
Solution Approach 1:
A non-conductive barrier layer is deposited on the sidewalls of the top electrode and ferroelectric layer before the bottom electrode etching process. This preliminary action prevents conductive residues from being deposited on the sidewalls during etching, thereby eliminating leakage paths and improving device yield without affecting fabrication completion
Solution Approach 2:
The non-conductive barrier layer acts as an intermediary between the etching process and the sidewalls of the capacitor structure. It selectively protects the sidewalls from conductive residue deposition while allowing the etching process to proceed, thus resolving the conflict between fabrication completion and device yield
2Manufacturing precision
If aggressive dry and/or wet cleans are used to remove conductive residues, then residue removal may be improved, but other features or elements in the F-RAM are potentially damaged
Solution Approach 1:
The non-conductive barrier layer is deposited before etching to prevent conductive residue formation on sidewalls. This eliminates the need for subsequent aggressive cleaning steps, thereby maintaining manufacturing precision while avoiding damage to other F-RAM features
Solution Approach 2:
The invention converts the potentially harmful aggressive cleaning process into a beneficial prevention strategy by depositing the non-conductive barrier layer beforehand. This prevents residue formation at the source, eliminating the need for harmful cleans while improving overall process safety for other device features
3Ease of manufacture
If conventional cleaning steps are used, then the process can proceed, but conductive residues remain on sidewalls forming high leakage paths or shorting electrodes
Solution Approach 1:
The non-conductive barrier layer is deposited on sidewalls before the bottom electrode etching process, preventing conductive residue deposition that would otherwise occur during conventional cleaning steps. This maintains process continuity while ensuring reliable capacitor operation by eliminating leakage paths and preventing electrode shorting
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The non-conductive barrier effectively reduces sidewall leakage and defect density, increasing the yield of F-RAMs by preventing residue-induced shorting and maintaining capacitor functionality.
Implementation Method 1
a non-conductive barrier is formed on sidewalls of a ferroelectric capacitor to electrically isolate conductive residues that may be re-deposited on the sidewalls during etching of layers forming a bottom electrode and conductive oxygen (O2) barrier
Implementation Method 2
using etch chemistries selective to the barrier material, such as aluminum oxide or silicon nitride
Data Source
AI summary
Ferroelectric capacitors used in ferroelectric random access memories (F-RAM) and methods for fabricating the same to reduce sidewall leakage are described. In one embodiment, the method includes depositing over a surface of a substrate, a ferro stack including a bottom electrode layer electrically coupled to a bottom electrode contact extending through the substrate, a top electrode layer and ferroelectric layer there between. A hard-mask is formed over the ferro stack, and a top electrode formed by etching through the top electrode layer and at least partially through the ferroelectric layer. A non-conductive barrier is formed on sidewalls formed by etching through the top electrode layer and at least partially through the ferroelectric layer, and then a bottom electrode is formed by etching the bottom electrode layer so that conductive residues generated by the etching are electrically isolated from the top electrode by the non-conductive barrier.