Ferroelectric Capacitor Virtual Inductor Circuit
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Solution Overview
Problem
Conventional silicon-based MOSFETs and RLC circuits face limitations in power scaling, device dimension, and physical size, while conventional inductors are bulky and costly, hindering advancements in signal processing and filtering applications. Existing circuits struggle to provide gain and high-frequency roll-off without active elements, and inductors are difficult to integrate into compact forms.
Innovation Solution
The development of a ferroelectric capacitor structure with virtual inductor properties, using ferroelectric materials and buffer layers, which allows for a compact, efficient integrated circuit that achieves voltage gain and resonance behavior without physical inductors, enabling smaller and lighter devices with tunable resonance frequency and voltage gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of moving object
If conventional physical inductors are used in integrated circuits, then inductance function is achieved, but device size and weight increase significantly
Solution Approach 1:
The patent extracts the inductance function from conventional physical inductors and implements it through the negative capacitance effect in ferroelectric materials. The virtual inductor is created by combining a ferroelectric capacitor with a buffer amplifier, eliminating the need for bulky physical inductors while maintaining the required inductance function in the circuit.
Solution Approach 2:
The patent replaces the mechanical/physical inductor structure with an electronic equivalent using negative capacitance devices. Instead of using physical coils and magnetic fields, the inductance is synthesized through the electrical characteristics of the ferroelectric capacitor and buffer amplifier combination, achieving the same function with dramatically reduced size and weight.
2Length of moving object
If conventional RLC circuits are used for signal processing, then filtering and resonance functions are achieved, but device dimension scaling is limited
Solution Approach 1:
The patent changes the fundamental parameters of the circuit by introducing negative capacitance devices with extremely large capacitance values (exceeding conventional estimates by at least one million times). This parameter change enables the creation of virtual inductors with high inductance values in a compact form factor, allowing device dimension scaling while maintaining signal processing efficiency.
Solution Approach 2:
The patent uses composite structures combining ferroelectric materials with buffer amplifier circuits to create negative capacitance devices. This composite approach integrates the unique properties of ferroelectric materials (high dielectric constant, switchable polarization) with active circuit elements to achieve the desired electrical characteristics for compact RLC circuit functionality.
3Ease of manufacture
If conventional inductors are used for impedance matching and filtering, then circuit functionality is achieved, but manufacturing cost increases
Solution Approach 1:
The patent creates a virtual copy of the inductor function using negative capacitance devices rather than manufacturing actual physical inductors. The virtual inductor replicates the electrical behavior of a conventional inductor (impedance, resonance, filtering) without requiring the complex physical structure, wire winding, and magnetic core materials that increase manufacturing cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ferroelectric capacitor structure significantly reduces the size and weight of integrated circuits, providing enhanced resonance behavior and voltage gain, with inductance values exceeding conventional estimates by at least one million times, enabling more efficient signal processing and filtering applications.
Implementation Method 1
a ferroelectric layer sandwiched between a first buffer layer and a second buffer layer
Implementation Method 2
The development of a ferroelectric capacitor structure with virtual inductor properties, using ferroelectric materials and buffer layers, which allows for a compact, efficient integrated circuit that achieves voltage gain and resonance behavior without physical inductors
Implementation Method 3
providing enhanced resonance behavior and voltage gain, with inductance values exceeding conventional estimates by at least one million times
Data Source
Figure 1A
Figure 1B
Figure 2A
AI summary
Circuit comprises a ferroelectric layer sandwiched between a first buffer layer and a second buffer layer. The first buffer layer contacts a portion of a first metal layer and first metal layer extends beyond the first buffer layer. A dielectric layer sandwiched between a second metal layer and a third metal layer. Such that the second metal layer extends beyond the dielectric layer and in contact with the second buffer layer. Wherein the ferroelectric capacitor is formed by the first metal layer. The ferroelectric layer sandwiched between the first buffer layer and the second buffer layer, and the second metal layer.