Ferroelectric FET Weight Cell for SoC Neuromorphic Integration

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Solution Overview

Problem

Existing artificial neural network (ANN) systems face challenges in precisely programming analog weights due to the non-linear nature of non-volatile memory elements, leading to complex circuit designs and energy inefficiencies, and struggle with uniform weight distribution when using NVM elements in series with passive resistors, making them less suitable for system-on-chip integration.

Innovation Solution

A neuromorphic multi-bit digital weight cell is designed with a parallel configuration of passive resistors and series gating transistors, utilizing ferroelectric FETs to achieve uniform weight distribution by storing weights as states of a ferroelectric capacitor, enabling accurate weight storage and transfer, and suitable for integration with SoC CMOS processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If analog memory elements are used to store neuron weights, then the multiply-and-add operations can be performed efficiently, but the hardware design becomes complex due to difficulty in precisely programming analog weights

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the weight storage function into discrete digital levels (e.g., 3-bit weights with 8 quantization levels) rather than continuous analog values. Each weight is represented by a specific combination of selected resistors and transistor states, dividing the continuous weight range into manageable discrete steps that are easier to program and control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter representation from continuous analog conductance to discrete digital weight levels. By using controlled voltage levels (e.g., 0V for OFF, VDD for ON) applied to transistor gates, the system transitions from programming difficult analog values to setting discrete digital states, simplifying the programming process while maintaining computational efficiency.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If NVM elements are used in series with passive resistors to activate current paths, then high-density integration is achieved, but uniform weight distribution cannot be obtained

Engineering Contradiction:
Improveintegration densityVSAvoidweight distribution uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent introduces dynamic control through transistor gating mechanisms that can selectively activate or deactivate current paths through passive resistors. By dynamically controlling which transistors are ON or OFF, the system can achieve uniform weight distribution across multiple neurons sharing the same resistive elements, overcoming the static limitation of simple series NVM-resistor configurations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses transistors as intermediary control elements between the NVM elements and the passive resistors. These transistor intermediaries provide precise control over current flow, enabling uniform weight distribution by selectively enabling or disabling specific current paths. The transistor gate voltages act as mediators that translate digital weight codes into controlled analog current distributions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If feedback loops are implemented to sense programming levels for analog weights, then precise weight programming is achieved, but energy requirements and circuit size increase significantly

Engineering Contradiction:
Improveweight programming precisionVSAvoidprogramming energy
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent employs self-service mechanisms where the weight programming is achieved through direct voltage application to transistor gates without requiring external feedback sensing loops. The digital-to-analog conversion is performed in-place at the weight cell level using the transistor network itself, eliminating the need for separate sensing and feedback circuitry that would consume additional energy and increase circuit complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces the mechanical feedback loop system with an electrical direct-programming approach. Instead of using physical sensing loops to detect and adjust analog weight values iteratively, the system uses direct voltage control of transistor gates to set weight values in a single step, substituting a complex feedback mechanism with a simpler direct electrical control method.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a uniform distribution of weights, improving accuracy and reducing the number of neurons needed for the same accuracy, enabling efficient ANN training and wider neural network implementation, while being compatible with SoC integration.

Implementation Method 1

storing weights as states of a ferroelectric capacitor

Methodology Applied
Scientific EffectFerroelectric effect:

Implementation Method 2

utilizing ferroelectric FETs to achieve uniform weight distribution by storing weights as states of a ferroelectric capacitor

Methodology Applied
Scientific EffectFerroelectric effect:

Data Source

PatentUS11727258B2Multi-bit, SoC-compatible neuromorphic weight cell using ferroelectric FETs
Publication Date: 2023.08.15 SAMSUNG ELECTRONICS CO LTD
  • US11727258B2 patent drawing
  • US11727258B2 patent drawing
  • US11727258B2 patent drawing

AI summary

A neuromorphic multi-bit digital weight cell configured to store a series of potential weights for a neuron in an artificial neural network. The neuromorphic multi-bit digital weight cell includes a parallel cell including a series of passive resistors in parallel and a series of gating transistors. Each gating transistor of the series of gating transistors is in series with one passive resistor of the series of passive resistors. The neuromorphic cell also includes a series of programming input lines connected to the series of gating transistors, an input terminal connected to the parallel cell, and an output terminal connected to the parallel cell.