Ferroelectric Gate Stack Crystallization for Low-Voltage NCFETs

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Solution Overview

Problem

As the semiconductor industry continues to reduce minimum feature sizes to increase integration density, challenges arise in the manufacturing of semiconductor devices, particularly in forming reliable and efficient field effect transistors with improved switching characteristics at lower voltages.

Innovation Solution

The manufacturing process involves forming negative capacitance field effect transistors (NCFETs) using ferroelectric materials with a metal layer to seed crystallization and control grain size, combined with a conductive gate stack, to achieve lower voltage switching and improved transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature sizes are reduced to increase integration density, then integration density is improved, but manufacturing reliability deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The gate structure is segmented into multiple thin film layers (ferroelectric layer, metal layer, semiconductor layer) rather than using a single thick layer, allowing each layer to be formed with precise thickness control through atomic layer deposition, thereby maintaining manufacturing reliability at reduced feature sizes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the physical and chemical parameters of the gate stack by using specific ferroelectric materials (e.g., hafnium zirconium oxide, hafnium aluminum oxide) with controlled compositions and thicknesses, enabling reliable operation at lower voltages and smaller dimensions while maintaining device performance

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If conventional transistors are used, then manufacturing is simpler, but switching characteristics at lower voltages deteriorate

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidswitching characteristics
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention changes the electrical parameters by introducing ferroelectric materials with high dielectric constants into the gate stack, enabling enhanced charge control and lower voltage switching operation while maintaining compatibility with existing semiconductor manufacturing processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The gate stack uses composite materials combining ferroelectric layers (e.g., hafnium zirconium oxide), metal layers (e.g., tungsten, titanium nitride), and semiconductor layers, creating a multi-material structure that achieves superior switching characteristics while remaining manufacturable through sequential deposition processes

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of transistors with enhanced switching characteristics at lower voltages, improving integration density and device performance while maintaining reliability.

Implementation Method 1

a crystallized ferroelectric layer in physical contact with the interfacial layer, the crystallized ferroelectric layer comprising multiple crystalline regions with grain boundaries between adjacent ones of the multiple crystalline regions

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Implementation Method 2

using ferroelectric materials with a metal layer to seed crystallization and control grain size

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS20240387728A1Semiconductor device and method
Publication Date: 2024.11.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240387728A1 patent drawing
  • US20240387728A1 patent drawing
  • US20240387728A1 patent drawing

AI summary

A semiconductor device and method of manufacture are provided which utilizes metallic seeds to help crystallize a ferroelectric layer. In an embodiment a metal layer and a ferroelectric layer are formed adjacent to each other and then the metal layer is diffused into the ferroelectric layer. Once in place, a crystallization process is performed which utilizes the material of the metal layer as seed crystals.