Lattice-Matched Ferroelectric Gate Dielectric for Low-Voltage FETs
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Solution Overview
Problem
Ferroelectric field-effect transistors (FEFETs) typically have high threshold voltage and leakage current due to their ferroelectric materials, which hinders efficient power dissipation and transistor performance.
Innovation Solution
A transistor design utilizing a ferroelectric gate dielectric, such as lead zirconate titanate (PZT), lattice-matched to the channel material, reduces lattice defects and trapped charges, enabling lower threshold voltage and leakage current through controlled spontaneous polarization switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a ferroelectric gate dielectric is used in a transistor, then the transistor can maintain its state without external voltage and exhibit non-volatile memory capabilities, but the threshold voltage and leakage current increase
Solution Approach 1:
The patent changes the physical and chemical parameters of the gate dielectric by using a graded composition approach. The gate dielectric transitions from a first composition near the channel interface to a second composition at the gate electrode interface, creating a gradient that optimizes both threshold voltage control and state retention while reducing leakage current compared to uniform ferroelectric materials
Solution Approach 2:
The patent employs a composite gate dielectric structure consisting of multiple layers with different compositions. The gate dielectric includes a first portion with a first composition and a second portion with a second composition, forming a composite material that combines the benefits of different dielectric properties to achieve low threshold voltage and low leakage current simultaneously
2Adaptability or versatility
If a ferroelectric gate dielectric is used in a transistor, then non-volatile memory capabilities are achieved, but power dissipation increases
Solution Approach 1:
The graded composition of the gate dielectric allows for optimized parameter distribution, where the composition varies spatially to balance memory retention capabilities with power dissipation characteristics, achieving non-volatile memory functionality with reduced energy loss compared to conventional uniform ferroelectric structures
Solution Approach 2:
The composite gate dielectric structure with varying compositions enables the transistor to achieve non-volatile memory capabilities while managing power dissipation. The different composition regions contribute differently to memory retention and power characteristics, creating a balanced performance profile
3Ease of manufacture
If conventional gate dielectric materials are used, then manufacturing is simpler, but lattice defects and trapped charges increase
Solution Approach 1:
The patent uses parameter changes in the gate dielectric composition to achieve lattice matching with the channel material. By carefully controlling the composition gradient and selecting appropriate material parameters, the invention reduces lattice defects and trapped charges while maintaining manufacturability through established deposition techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in reduced power dissipation and enhanced transistor performance, enabling low-threshold switching and non-volatile memory capabilities while maintaining the transistor's state without external voltage.
Implementation Method 1
enabling lower threshold voltage and leakage current through controlled spontaneous polarization switching
Data Source
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AI summary
Technologies for a transistor (100) with a ferroelectric gate dielectric are disclosed. In the illustrative embodiment, a transistor has a ferroelectric gate dielectric (116) that is lattice matched to the channel (110) of the transistor. In one embodiment, the ferroelectric polarization changes when voltage is applied and removed from a gate electrode, facilitating switching of the transistor at a lower applied voltage. In another embodiment, the ferroelectric polarization of a gate dielectric of a transistor changes when the voltage is past a positive threshold value or a negative threshold value. Such a transistor can be used as a one transistor memory cell.