Ferroelectric Gate Stack for Memory Window and Reliability

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Solution Overview

Problem

The challenge of forming reliable semiconductor devices at smaller sizes is exacerbated by the difficulty of fabrication processes as feature sizes continue to decrease, leading to issues with device performance and reliability.

Innovation Solution

A memory device design utilizing a ferroelectric stack with a thin dielectric layer inserted between two ferroelectric layers, where the first ferroelectric layer is thicker than the second, enhances memory window performance without increasing overall thickness, and is fabricated using a sequential manufacturing process involving ALD deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency is improved and costs are lowered, but fabrication process difficulty increases and device reliability deteriorates

Engineering Contradiction:

Improveproduction efficiencyVSAvoiddevice reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the physical and chemical parameters of the ferroelectric material by controlling the thickness of the first ferroelectric layer to be greater than that of the second ferroelectric layer. This parameter optimization maintains strong ferroelectricity while ensuring fabrication reliability at scaled dimensions, directly addressing the contradiction between miniaturization and device reliability

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure consisting of two ferroelectric layers with different thicknesses formed by sequential ALD deposition. This composite approach allows optimization of ferroelectric properties while maintaining manufacturing controllability, resolving the tension between increased functional density and fabrication difficulty

Inventive Principle:

Principle #40Composite materials

2Reliability

If a thin dielectric layer is inserted between two ferroelectric layers to enhance memory window performance, then memory window capability is improved, but device structure complexity increases

Engineering Contradiction:

Improvememory window capabilityVSAvoidferroelectric stack structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the ferroelectric stack into three distinct layers: a first ferroelectric layer, a thin dielectric layer, and a second ferroelectric layer. This segmentation allows each layer to be optimized independently for its specific function, improving memory window capability while managing structural complexity through modular design

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The thin dielectric layer acts as an intermediary between the two ferroelectric layers, enhancing the memory window capability by modifying the electric field distribution. This intermediary layer resolves the contradiction by providing a simple structural addition that delivers significant performance improvement without proportionally increasing complexity

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If the first ferroelectric layer is made thicker than the second to maintain ferroelectricity, then ferroelectric property strength is improved, but overall device thickness increases

Engineering Contradiction:

Improveferroelectric property strengthVSAvoidoverall device thickness

Core Design Contradiction:

ReliabilityVSLength of stationary object

Solution Approach 1:

The patent optimizes the thickness parameters of individual ferroelectric layers, setting the first layer thicker than the second, to maintain strong ferroelectricity. This parameter optimization achieves the desired ferroelectric property strength without requiring a proportional increase in overall device thickness, as the asymmetric thickness distribution is more efficient than uniform thickening

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design improves device performance by maintaining ferroelectricity and reducing degradation, resulting in enhanced memory window capabilities and reliability.

Implementation Method 1

a method includes forming a semiconductor layer over a substrate; depositing a first ferroelectric layer over a channel region of the semiconductor layer; depositing a first dielectric layer over the first ferroelectric layer; depositing a second ferroelectric layer over the first dielectric layer

Methodology Applied

Scientific EffectAtomic Layer Deposition (ALD): Chemical Vapour Deposition

Data Source

PatentUS12610552B2Memory device and method for forming the same

Publication Date: 2026.04.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method includes forming a semiconductor layer over a substrate; depositing a first ferroelectric layer over a channel region of the semiconductor layer; depositing a first dielectric layer over the first ferroelectric layer; depositing a second ferroelectric layer over the first dielectric layer; depositing a gate metal layer over the second ferroelectric layer; patterning the gate metal layer, the second ferroelectric layer, the first dielectric layer, and the first ferroelectric layer to form a gate structure; and forming source/drain regions in the semiconductor layer and on opposite sides of the gate structure.