Ferroelectric Gate Stack for Ultra-Low Leakage Current
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Solution Overview
Problem
Existing oxide-semiconductor field effect transistor (OSFET) devices require a negative back gate voltage greater than the gate voltage to achieve ultra-low leakage current, necessitating additional chip area for a negative charge pump.
Innovation Solution
Incorporating a ferroelectric material layer between the channel layer and the gate electrode, which overlaps with the source and drain regions, and using a back-gate electrode with a voltage less than zero volts, allowing for reduced chip area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a negative back gate voltage greater than the gate voltage is applied to achieve ultra-low leakage current, then the leakage current is reduced, but additional chip area is required for a negative charge pump
Solution Approach 1:
The patent extracts and eliminates the negative charge pump component from the system by using a ferroelectric material layer that inherently provides the necessary negative voltage effect through its polarization properties, thereby reducing chip area while maintaining ultra-low leakage current performance
Solution Approach 2:
The patent changes the electrical parameter generation mechanism from an external active charge pump to a passive ferroelectric polarization effect, where the ferroelectric material layer spontaneously generates the required negative voltage offset without additional power consumption or chip area
2Reliability
If a negative charge pump is added to generate the required back gate voltage, then the threshold voltage control is improved, but the device complexity increases
Solution Approach 1:
The patent removes the complex negative charge pump circuitry and replaces it with a simple ferroelectric material layer integrated into the gate stack, significantly reducing device complexity while preserving threshold voltage control capability
Solution Approach 2:
The patent uses a composite structure combining ferroelectric material with the gate dielectric layer to achieve both threshold voltage control and ultra-low leakage current without requiring separate control circuits, thereby simplifying the overall device architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables ultra-low leakage current without the need for additional negative charge pumps, optimizing chip area usage while maintaining effective device operation.
Implementation Method 1
a gate dielectric layer, and a ferroelectric material layer. The ferroelectric material layer overlaps with the source region and overlaps with the drain region
Data Source
AI summary
A semiconductor device includes a substrate, a source region and a drain region, a gate dielectric layer, and a ferroelectric material layer. The ferroelectric material layer overlaps with the source region and overlaps with the drain region. The substrate further comprises a channel layer. A gate electrode is disposed on the substrate. The ferroelectric material layer is disposed between the channel layer and the gate electrode.