Ferroelectric Gate Dielectric Stack for SiC MOSFET Overcurrent Limiting
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Solution Overview
Problem
Power transistors, particularly SiC MOSFETs, face challenges in short-circuit/overcurrent protection due to high instantaneous power density and rapid temperature rise, leading to overheating and reliability issues, as existing heat dissipation mechanisms and gate drive designs struggle to respond quickly enough to prevent device destruction.
Innovation Solution
Incorporating a ferroelectric insulator in the gate dielectric stack of power transistors, which undergoes a phase transition above the Curie temperature, increasing the threshold voltage and reducing drain current to limit overcurrent conditions, and using a driver control circuit to set the ferroelectric insulator into a defined polarization state for enhanced protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If passive heat dissipation measures and temperature sensors are used, then overheating is avoided, but device complexity and die area increase
Solution Approach 1:
The gate dielectric stack automatically limits drain current during overtemperature conditions through the ferroelectric phase transition, eliminating the need for external temperature sensors and complex control circuits. The device self-regulates by exploiting the intrinsic temperature-dependent properties of the ferroelectric material.
Solution Approach 2:
The invention changes the electrical parameters (threshold voltage, drain current) of the transistor based on temperature by incorporating a ferroelectric insulator in the gate dielectric stack. The ferroelectric material undergoes a phase transition at the Curie temperature, causing a significant increase in threshold voltage and automatic current limiting without additional components.
2Productivity
If SiC MOSFETs operate under short circuit conditions, then high current density is achieved, but temperature rise is rapid due to low thermal capacitance
Solution Approach 1:
The ferroelectric insulator is pre-configured in the gate dielectric stack to automatically respond to temperature increases. When the Curie temperature is reached during short circuit conditions, the ferroelectric phase transition occurs, immediately increasing threshold voltage and limiting current before thermal damage can occur, providing intrinsic short-circuit protection.
Solution Approach 2:
The invention converts the harmful effect of rapid temperature rise into a beneficial protective mechanism. The low thermal capacitance that causes fast temperature rise also enables the ferroelectric material to quickly reach its Curie temperature and trigger the phase transition, creating a fast-acting thermal protection mechanism that limits current during short circuit conditions.
3Reliability
If gate drive detects overcurrent condition and turns off MOSFET, then die protection is ensured, but response time must be extremely fast which poses design challenge
Solution Approach 1:
The transistor provides its own overcurrent protection through the ferroelectric gate dielectric stack, eliminating the burden on the gate drive to detect and respond to fault conditions. The intrinsic thermal response of the ferroelectric material automatically limits current during overtemperature events, providing die protection without requiring ultra-fast gate drive response.
Solution Approach 2:
The ferroelectric insulator acts as an intermediary between temperature and electrical current. Instead of requiring the gate drive to detect temperature or current and then respond, the ferroelectric material directly mediates the relationship by converting thermal energy into electrical effects (phase transition), which automatically limits current flow without external control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ferroelectric-based gate dielectric stack effectively decouples the trade-off between on-resistance at normal temperatures and short-circuit protection, ensuring safe turn-off during critical periods and maintaining device reliability by self-regulating drain current and threshold voltage.
Implementation Method 1
the ferroelectric insulator, which undergoes a phase transition above a specific temperature, increasing the threshold voltage and reducing drain current
Implementation Method 2
the gate dielectric stack comprises a ferroelectric insulator... the ferroelectric insulator effectively limits overcurrent conditions by increasing the threshold voltage at elevated temperatures
Data Source
AI summary
A power semiconductor device includes a semiconductor substrate and a plurality of transistor cells formed in the semiconductor substrate and electrically connected in parallel to form a power transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the semiconductor substrate. The gate dielectric stack includes a ferroelectric insulator and a first dielectric insulator. The first dielectric insulator has a relative permittivity greater than that of silicon dioxide. A driver device for switching the power transistor and a corresponding method of operating the power transistor are also described.


