Semiconductor Device With Ferroelectric Gate For Threshold Voltage Control
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Solution Overview
Problem
Current semiconductor devices for high power-high frequency systems face challenges in achieving both positive and negative threshold voltages efficiently, leading to complications in fabrication and reduced drain current, which affects performance and frequency characteristics.
Innovation Solution
A flexible semiconductor device is designed with a substrate having distinct regions for transistors with positive and negative threshold voltages, incorporating a ferroelectric pattern and hexagonal boron nitride layer, along with a specific electrode and insulation structure, and a method of fabrication that includes sequential layering and sacrificial substrate removal to minimize defects and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor devices are used for high power-high frequency systems, then fabrication processes become complicated and defects increase, but device performance and frequency characteristics are compromised
Solution Approach 1:
The device is divided into distinct first and second regions with different transistor configurations. The first region contains transistors with positive threshold voltage while the second region contains transistors with negative threshold voltage. This segmentation allows each region to be optimized for specific functions, simplifying the overall fabrication process while maintaining high performance and frequency characteristics in both regions independently.
2Power
If transistors with positive threshold voltage are implemented, then output characteristics are maintained, but frequency characteristics deteriorate
Solution Approach 1:
Different threshold voltage characteristics are applied locally to different regions of the device. The first region uses positive threshold voltage transistors optimized for high output characteristics and power handling, while the second region uses negative threshold voltage transistors optimized for high frequency operation. This local differentiation resolves the contradiction by allowing each region to excel at its specific function without compromising the other.
3Ease of manufacture
If conventional fabrication methods are used, then manufacturing costs increase, but device performance is reduced
Solution Approach 1:
The fabrication process merges the formation of positive and negative threshold voltage transistors into a single integrated device structure. By combining both transistor types in one device with shared fabrication steps, the method reduces overall manufacturing costs compared to producing separate devices, while maintaining high performance characteristics through the synergistic integration of both region types.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves positive threshold voltage without compromising output and frequency characteristics, enabling flexible high power-high frequency operation while reducing fabrication defects and costs.
Implementation Method 1
a ferroelectric pattern interposed between the first gate electrode and the barrier layer
Implementation Method 2
a hexagonal boron nitride layer interposed between the substrate and the buffer layer
Implementation Method 3
A high electron mobility transistor (HEMT) uses a 2-dimensional electron gas (2DEG) layer, which is generated by polarization and band discontinuity at an hetero-junction interface of semiconductor materials having different band gaps, as a channel layer
Implementation Method 4
a 2-dimensional electron gas (2DEG) layer, which is generated by polarization and band discontinuity at an hetero-junction interface
Implementation Method 5
a 2-dimensional electron gas (2DEG) layer, which is generated by polarization and band discontinuity at an hetero-junction interface of semiconductor materials having different band gaps
Data Source
AI summary
Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate having a first region and a second region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a barrier layer disposed on the semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode disposed therebetween, which are disposed on the barrier layer in the first region, a second source electrode, a second drain electrode, and a second gate electrode disposed therebetween, which are disposed on the barrier layer in the second region, and a ferroelectric pattern interposed between the first gate electrode and the barrier layer.