Ferroelectric HfO2 Gate Stack for Low-Power NC FET Switching

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Solution Overview

Problem

Conventional semiconductor devices face challenges in achieving a low subthreshold swing (S.S.) and efficient power operation due to the limitations of high-K gate materials like HfO2, which are amorphous and paraelectric, and ferroelectric materials like PZT or BaTiO3, which are not fully compatible with silicon-based semiconductors and degrade with thickness reduction.

Innovation Solution

The integration of a doped HfO2 layer with an orthorhombic crystal phase, controlled by a bottom and upper crystal structure control layer, to create a negative capacitance field effect transistor (NC FET) that includes a ferroelectric dielectric layer with specific doping and orientation, enhancing the ferroelectric properties and reducing power supply requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional high-K gate materials like HfO2 are used, then the device structure is simple and manufacturing is easier, but the subthreshold swing cannot be sufficiently reduced and power operation efficiency is limited

Engineering Contradiction:
Improvepower operation efficiencyVSAvoidgate structure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent employs a composite gate structure consisting of multiple layers including HfO2, Al2O3, and TiN layers. This composite material approach combines the high-K properties of HfO2 with the ferroelectric characteristics of Al2O3, enabling reduced subthreshold swing while maintaining structural integrity and compatibility with existing manufacturing processes

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent modifies the physical and chemical parameters of the gate materials by controlling doping concentrations, layer thicknesses, and crystalline phases. Specifically, it induces orthorhombic phase in HfO2 and controls the thickness of Al2O3 layer to achieve optimal ferroelectric properties, thereby reducing power consumption without excessive structural complexity

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If ferroelectric materials like PZT or BaTiO3 are used to reduce subthreshold swing, then power operation efficiency improves, but compatibility with silicon-based semiconductors is poor and performance degrades with thickness reduction

Engineering Contradiction:
Improvepower operation efficiencyVSAvoidcompatibility with silicon-based semiconductors
Core Design Contradiction:
Use of energy by moving objectVSEase of manufacture

Solution Approach 1:

The patent replaces conventional ferroelectric materials (PZT, BaTiO3) with an Al2O3-based gate structure that can be formed using standard semiconductor manufacturing techniques. This approach uses materials and processes that are already compatible with silicon-based semiconductor fabrication, eliminating compatibility issues while achieving the desired ferroelectric effect through controlled thickness and phase

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent achieves ferroelectric properties in Al2O3 by controlling the thickness parameter (5-15 nm range) and inducing specific crystalline phases through doping and thermal processing. This parameter control enables compatibility with silicon-based semiconductors while maintaining the thickness requirements for effective ferroelectric operation

Inventive Principle:
Principle #35Parameter changes

3Length of moving object

If the thickness of ferroelectric materials is reduced to improve device scaling, then device miniaturization is achieved, but ferroelectric properties and performance degrade

Engineering Contradiction:
Improvedevice dimensionsVSAvoidferroelectric properties
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent uses a composite gate structure with HfO2 and Al2O3 layers where each material compensates for the limitations of the other at reduced thicknesses. The HfO2 provides high-K dielectric properties while the Al2O3 layer induces and maintains ferroelectric phase, enabling reliable ferroelectric operation at scaled dimensions

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent maintains ferroelectric properties at reduced thickness by controlling the Al2O3 layer thickness (5-15 nm) and doping concentration, and by inducing orthorhombic phase in HfO2. These parameter adjustments ensure that the ferroelectric effect persists even as device dimensions are reduced for scaling

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves a steep subthreshold swing for low power operation by utilizing a doped HfO2 layer with controlled crystal orientation, improving the ferroelectric properties and reducing power consumption in semiconductor devices.

Implementation Method 1

After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase

Methodology Applied
Scientific EffectPhase transition: Phase Change

Implementation Method 2

an annealing operation is performed followed by a cooling operation

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 3

a negative capacitance field effect transistor (NC FET) that includes a ferroelectric dielectric layer with specific doping and orientation, enhancing the ferroelectric properties

Methodology Applied
Scientific EffectNegative capacitance: Capacitance

Data Source

PatentUS12477810B2Semiconductor device and manufacturing method thereof
Publication Date: 2025.11.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12477810B2 patent drawing
  • US12477810B2 patent drawing
  • US12477810B2 patent drawing

AI summary

In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase. The first metallic film includes a oriented crystalline layer.