Ferroelectric HfO2 Gate Stack for Negative Capacitance MOSFETs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices face challenges in achieving a low subthreshold swing (S.S.) and efficient power operation due to the limitations of high-K gate materials like HfO2, which are amorphous and paraelectric, and ferroelectric materials like PZT or BaTiO3, which are not fully compatible with silicon-based semiconductors and degrade with thickness reduction.
Innovation Solution
The integration of a doped HfO2 layer with an orthorhombic crystal phase, controlled through a bottom and upper crystal structure control layer, to achieve a negative capacitance effect in NC FETs, utilizing a ferroelectric capacitor connected to the MOS FET gate, either separately or within sidewall spacers, enhancing the ferroelectric properties and reducing power supply requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Force
If high-K gate materials like HfO2 are used, then the gate dielectric constant is improved, but the material remains amorphous and paraelectric, failing to achieve negative capacitance effect
Solution Approach 1:
The patent changes the crystal phase parameter of HfO2 from amorphous to orthorhombic through doping and thermal processing, transforming the material from paraelectric to ferroelectric state, thereby achieving negative capacitance effect while maintaining high-K properties
Solution Approach 2:
The patent creates a composite structure by doping HfO2 with other elements (such as Si, Al, or Ta) to stabilize the orthorhombic phase, combining the high-K property of HfO2 with the ferroelectric properties of the doped composite material
2Reliability
If traditional ferroelectric materials like PZT or BaTiO3 are used, then the ferroelectric properties are improved, but compatibility with silicon-based semiconductors deteriorates and the materials degrade with thickness reduction
Solution Approach 1:
The patent changes the material composition parameter by doping HfO2 with specific elements and controlling the doping concentration, which stabilizes the orthorhombic phase at thin film thicknesses compatible with modern CMOS technology, achieving both ferroelectricity and manufacturing compatibility
Solution Approach 2:
The patent applies different doping concentrations and thermal processing conditions to different regions of the gate stack to optimize local ferroelectric properties while maintaining overall compatibility with silicon-based semiconductor processes
3Length of moving object
If ferroelectric material thickness is reduced to meet scaling requirements, then device miniaturization is achieved, but the ferroelectric properties and stability deteriorate
Solution Approach 1:
The patent changes the phase stability parameter by introducing dopants that lower the phase transition temperature and stabilize the orthorhombic phase at ultrathin dimensions, enabling ferroelectricity to be maintained at thicknesses of 5nm or less
Solution Approach 2:
The patent introduces an intermediary layer or interface engineering between the ferroelectric HfO2 and the underlying silicon channel, which mediates the stress and electrical field distribution, thereby maintaining ferroelectric stability at reduced thicknesses
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly lowers the subthreshold swing and power supply voltage, enabling efficient low-power operation of FETs by leveraging the ferroelectric properties of doped HfO2, which is compatible with silicon-based semiconductors and maintains stability even at reduced thicknesses.
Implementation Method 1
After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase
Implementation Method 2
the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase
Implementation Method 3
achieve a negative capacitance effect in NC FETs, utilizing a ferroelectric capacitor connected to the MOS FET gate
Data Source
AI summary
In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase. The first metallic film includes a oriented crystalline layer.