Ferroelectric Memory Device Induction Layer Thickness
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Solution Overview
Problem
Ferroelectric memory devices face limitations in increasing the effective thickness of ferroelectric layers beyond 15 nm while maintaining ferroelectric properties, which restricts the memory window and storage capacity.
Innovation Solution
Incorporating a ferroelectric induction layer with a paraelectric property between the first and second ferroelectric layers, which stabilizes the ferroelectric properties and allows for an increased thickness of the gate dielectric layer, enhancing the memory window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness of ferroelectric layers is increased beyond 15 nm, then the storage capacity and memory window are improved, but the ferroelectric properties deteriorate and cannot be maintained
Solution Approach 1:
A paraelectric induction layer is introduced between the first and second ferroelectric layers to mediate the interaction between them. This induction layer has a dielectric constant higher than the surrounding ferroelectric layers, creating a strong electric field that induces and stabilizes ferroelectric polarization in the thicker ferroelectric layers, thereby maintaining ferroelectric properties at greater thicknesses
Solution Approach 2:
The gate dielectric structure is designed as a composite material system consisting of multiple layers: ferroelectric layers, paraelectric induction layer, and non-ferroelectric dielectric layers. This composite structure combines the high dielectric constant of the paraelectric layer with the ferroelectric properties of the ferroelectric layers, enabling the system to maintain ferroelectricity at increased thicknesses while improving storage capacity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases the memory window of the ferroelectric memory device by allowing the ferroelectric layers to maintain their properties at greater thicknesses, thereby improving storage capacity and performance.
Implementation Method 1
a ferroelectric induction layer disposed on the first ferroelectric layer, the ferroelectric induction layer including an insulator
Data Source
AI summary
A ferroelectric memory device according to an aspect of the present disclosure includes a substrate having a channel layer, a first ferroelectric layer disposed on the channel layer, a ferroelectric induction layer disposed on the first ferroelectric layer, the ferroelectric induction layer including an insulator, a second ferroelectric layer disposed on the ferroelectric induction layer, and a gate electrode layer disposed on the second ferroelectric layer.