Ferroelectric Semiconductor Layer Orientation for Stable Threshold Voltage
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving controlled crystal orientations in ferroelectric layers, which affects the alignment of internal electric dipole moments and spontaneous polarization, limiting their application in logic and memory devices.
Innovation Solution
A semiconductor device is designed with a ferroelectric layer comprising crystal grains aligned within specific angle ranges in multiple directions, integrated between a semiconductor layer and an electrode, along with a paraelectric layer in an amorphous phase, to enhance polarization characteristics and reduce threshold voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric layer is used in semiconductor devices, then spontaneous polarization and internal electric dipole moments are achieved, but controlled crystal orientations are difficult to obtain
Solution Approach 1:
The patent changes the crystal structure parameter of the ferroelectric layer by selecting specific materials (HfZrO4, HfSiO4, HfAlO4) and controlling their composition ratios. By adjusting the Zr/Si/Al content and oxidation states, the patent achieves controlled crystal orientations ([111], [112], or [211] directions) while maintaining spontaneous polarization, thus resolving the contradiction between reliability and manufacturing precision.
2Ease of manufacture
If crystal grains in ferroelectric layer have random orientations, then material deposition is simplified, but polarization alignment and device performance are degraded
Solution Approach 1:
The patent applies local quality by creating specific regions with controlled crystal orientations within the ferroelectric layer. By using selective deposition conditions and material composition gradients, different portions of the layer develop preferred orientations ([111], (112), or (211)) that align polarization vectors, while the overall manufacturing process remains compatible with standard semiconductor fabrication techniques.
3Productivity
If ferroelectric layer thickness is reduced to improve device scaling, then device density increases, but polarization stability and depolarization field control become more difficult
Solution Approach 1:
The patent employs composite materials by combining hafnium oxide with zirconium, silicon, and/or aluminum to create a multi-component ferroelectric system. This composite approach allows tuning of both thickness and polarization stability - the patent demonstrates that layers as thin as 10 nm or less can maintain stable polarization through optimized material composition and crystal structure control, enabling device scaling without sacrificing reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The controlled crystal orientations in the ferroelectric layer improve polarization characteristics, reduce threshold voltage dispersion, and enhance the performance of electronic devices by aligning polarization orientations and increasing the depolarization field, thereby improving the sub-threshold swing.
Implementation Method 1
Ferroelectrics are materials with ferroelectricity, which may indicate that internal electric dipole moments are aligned to maintain a spontaneous polarization without an external electric field applied thereto
Implementation Method 2
a first crystal orientation aligned within a first angle range with respect to a first direction and a second crystal orientation aligned within a second angle range with respect to a second direction
Data Source
AI summary
Provided are a semiconductor device including a ferroelectric and an electronic apparatus including the semiconductor device. The semiconductor device includes a semiconductor layer, an electrode apart from the semiconductor layer, and a ferroelectric layer arranged between the semiconductor layer and the electrode. The ferroelectric layer includes a plurality of crystal grains, each of which having a first crystal orientation aligned within an angle range with respect to a first direction and having a second crystal orientation aligned within an angle range with respect to a second direction that is different from the first direction.


