Loop-Structured Nonvolatile Data Holding with Ferroelectric Separation
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Solution Overview
Problem
Conventional data holding devices using ferroelectric elements face issues such as high power consumption, speed reduction, and data corruption due to large load capacitance, necessitating multiple clock signals and being sensitive to power supply voltage fluctuations, while also requiring complex operations for data saving and restoration.
Innovation Solution
A data holding device is designed with a loop structure using logic gates, a nonvolatile storage portion utilizing hysteresis characteristics of ferroelectric elements, and a circuit separating portion to manage power supply voltages independently, allowing for efficient data storage and retrieval without increasing power consumption or reducing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric element is connected to a signal line in a storage element having a loop structure portion, then data can be held in a nonvolatile manner even after the power supply is turned off, but the ferroelectric element becomes a large load capacitance on the signal line which may cause a decrease of speed or an increase of power consumption
Solution Approach 1:
The patent divides the data holding function into two separate portions: a loop structure portion for volatile data holding during operation, and a ferroelectric element portion for nonvolatile data storage. This segmentation allows each portion to be optimized independently - the loop structure for speed and the ferroelectric element for nonvolatile retention - thereby resolving the contradiction between reliability and speed.
2Reliability
If the node is set to a floating state when data is read out, then the charge corresponding to the remanent polarization state does not leak to the power supply line or ground line, but four types of clock signals are required as drive clock signals which may cause an increase of power consumption
Solution Approach 1:
The patent extracts the nonvolatile storage function into a separate ferroelectric element portion, connected to the loop structure through a switching element. This allows the ferroelectric element to be disconnected from the signal line during normal operation, eliminating the need for complex clock signal management and reducing power consumption while maintaining charge retention reliability when needed.
3Quantity of substance
If the capacitance of the ferroelectric element is large while the gate capacitance of the transistor is small, then the voltage signal that shows up is as small as approximately 10 to 100 millivolts, but it is difficult to set the threshold value of the inverter for performing the 0-1 decision of the read data
Solution Approach 1:
The patent introduces a switching element as an intermediary between the ferroelectric element and the inverter. This switching element controls the connection between the large-capacitance ferroelectric element and the small-capacitance inverter input, enabling proper voltage signal levels for 0-1 decision while maintaining the benefits of large ferroelectric capacitance for nonvolatile storage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reliable, nonvolatile data storage with reduced power consumption and improved speed, allowing for seamless data retention and retrieval even during power fluctuations, without the need for complex clock management.
Implementation Method 1
When the power supply is turned off, a remanent polarization state of the ferroelectric element CL is set by using a voltage value on the signal line, so that data is written in the ferroelectric element CL
Implementation Method 2
the capacitance of the ferroelectric element CL (an upward-sloping solid line in FIG. 47) has a large value (a few hundred farads) while the gate capacitance of the transistor constituting the inverter INVx (a downward-sloping solid line in FIG. 47) has a small value (a few farads)
Data Source
AI summary
A data holding device according to the present invention includes a loop structure portion LOOP for holding data using a plurality of logic gates (NAND3 and NAND4) connected in a loop, a nonvolatile storage portion (NVM) for storing in a nonvolatile manner the data held in the loop structure portion (LOOP) by using the hysteresis characteristics of ferroelectric elements, a circuit separating portion (SEP) for electrically separating the loop structure portion (LOOP) and the nonvolatile storage portion (NVM), and a set/reset controller (SRC) for generating a set signal (SNL) and reset signal (RNL) based on data stored in the nonvolatile storage portion (NVM), wherein the plurality of logic gates are each set and reset to an arbitrary output logic level in accordance with the set signal (SNL) and reset signal (RNL).