Ferroelectric and Magnetic Memory Device for Multi-Level Signal Storage
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Solution Overview
Problem
Current nonvolatile memory devices face limitations in storing multi-level signals effectively, as they struggle to independently and sequentially control the resistance states of ferroelectric and magnetic memory elements for efficient data storage.
Innovation Solution
A nonvolatile memory device incorporating a ferroelectric memory element with a field effect transistor and a magnetic memory element, where the polarization direction of the ferroelectric gate dielectric layer and the magnetization direction of the free layer are changed using distinct switching voltages, allowing for the storage of multi-level signals by controlling channel and magnetic resistances in the same electrical path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If ferroelectric and magnetic memory elements are used together to store multi-level signals, then data storage efficiency is improved, but device complexity increases due to the need to independently control resistance states of both elements
Solution Approach 1:
The patent combines ferroelectric memory element (with field effect transistor) and magnetic memory element (with free layer, tunnel barrier layer, and fixed layer) into a single integrated memory device. The ferroelectric gate dielectric layer and magnetic layers are stacked vertically to form a unified structure that stores multi-level signals by simultaneously utilizing both ferroelectric polarization states and magnetic resistance states, thereby improving data storage efficiency while managing complexity through integration
Solution Approach 2:
The patent utilizes parameter changes in both ferroelectric and magnetic domains to encode multi-level data. By changing the polarization direction of the ferroelectric gate dielectric layer (affecting channel resistance) and the magnetization direction of the free layer (affecting magnetic resistance), the device can represent multiple resistance levels. This dual-parameter approach enables efficient multi-level signal storage
2Ease of operation
If distinct switching voltages are applied to control polarization and magnetization directions, then independent control of resistance states is achieved, but energy consumption increases
Solution Approach 1:
The patent segments the control mechanism into two distinct switching voltage pathways: one for changing the polarization direction of the ferroelectric gate dielectric layer (controlling channel resistance) and another for changing the magnetization direction of the free layer (controlling magnetic resistance). This segmentation allows independent control of each memory element's resistance state, enabling precise multi-level signal manipulation while managing energy consumption through targeted voltage application
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the storage of multi-level signals with four distinct resistance levels, enhancing data storage efficiency by independently controlling channel and magnetic resistances, thereby overcoming the limitations of existing technologies.
Implementation Method 1
a ferroelectric gate dielectric layer... A polarization direction of the ferroelectric gate dielectric layer is changed when a first switching voltage is applied to the gate electrode layer
Implementation Method 2
a free layer, a tunnel barrier layer and a fixed layer sequentially disposed over the first contact wire... a magnetization direction of the free layer is changed when a second switching voltage is applied between the free layer and the fixed layer
Data Source
AI summary
Disclosed is a nonvolatile memory device. The nonvolatile memory device includes a ferroelectric memory element including a field effect transistor having a ferroelectric gate dielectric layer and a drain electrode. The nonvolatile memory device also includes a resistive memory element electrically connected in series to the drain electrode of the field effect transistor. A multilevel signal is stored in the nonvolatile memory device according to a channel resistance of the ferroelectric memory element and a resistance of the resistive memory element.