Ferroelectric Memory Layers Tuned by ALD Pulse and Purge Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of ferroelectric materials with semiconductor device materials and structures is challenging due to difficulties in maintaining suitable ferroelectric properties and device performance, particularly in achieving high remnant polarization and coercive electrical field for next-generation non-volatile memory devices like FeFET and FeRAM.
Innovation Solution
The use of atomic layer deposition (ALD) with controlled precursor pulse durations and purge times to engineer the crystal structure and ferroelectric properties of hafnium zirconium oxide (HZO) layers, allowing for the formation of ferroelectric material layers with specific grain sizes and crystallinity that enhance remnant polarization and coercive field, such as using shorter pulse/purge sequences for smaller grain sizes and longer sequences for larger grain sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional deposition methods are used to form ferroelectric material layers, then integration with semiconductor device materials is easier, but the crystal structure stability and ferroelectric properties are insufficient
Solution Approach 1:
The patent applies parameter changes by precisely controlling ALD process parameters including precursor pulse durations (e.g., 0.1-10 seconds), purge times (e.g., 1-60 seconds), deposition temperature (e.g., 150-450°C), and oxygen partial pressure (e.g., 0.1-100 mTorr) to achieve stable orthorhombic crystal structure with high ferroelectric properties while maintaining compatibility with semiconductor manufacturing processes
Solution Approach 2:
The patent employs periodic action through the cyclic ALD process with alternating precursor pulses and purge cycles. The periodic introduction of different precursors (e.g., hafnium precursor followed by zirconium precursor) with controlled pulse durations creates uniform crystal grain structures and stabilizes the orthorhombic phase, resolving the contradiction between manufacturing ease and ferroelectric stability
2Stability of the object's composition
If uniform crystal grain sizes are achieved through controlled ALD, then orthorhombic phase stability is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent resolves this contradiction by optimizing specific ALD parameters: precursor pulse durations of 0.1-10 seconds with purge times of 1-60 seconds, deposition temperatures of 150-450°C, and oxygen partial pressures of 0.1-100 mTorr. These parameter changes achieve uniform crystal grain sizes and stable orthorhombic phase without excessive process complexity
Solution Approach 2:
The patent replaces mechanical/metallic deposition methods with atomic layer deposition (ALD), a chemical vapor deposition technique that provides atomic-level precision in controlling film thickness and composition. This substitution enables uniform crystal grain formation and phase stability through chemical control rather than mechanical processes
3Reliability
If high remnant polarization and coercive field are achieved, then ferroelectric memory performance is improved, but the integration with common semiconductor structures becomes more difficult
Solution Approach 1:
The patent employs composite materials by forming multilayer ferroelectric structures with alternating hafnium-zirconium oxide layers. The composite structure combines different materials with complementary properties to achieve high remnant polarization and coercive field while maintaining compatibility with standard semiconductor device architectures through controlled interfaces and layer thicknesses
Solution Approach 2:
The patent achieves high ferroelectric performance parameters (remnant polarization and coercive field) by controlling deposition parameters including temperature (150-450°C), oxygen partial pressure (0.1-100 mTorr), and precursor pulse durations. These parameter changes enable high performance while maintaining manufacturability through standardized ALD process conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in ferroelectric material layers with improved crystallinity and ferroelectric properties, such as high remnant polarization and coercive field, which are essential for stable data retention and noise resistance in memory devices, while also enabling integration with semiconductor structures without damaging existing devices.
Implementation Method 1
Employing atomic layer deposition (ALD) with controlled precursor pulse durations and purge times to engineer crystal structure and ferroelectric properties
Implementation Method 2
The as-deposited FE material layer 240 may be annealed to enhance the crystallinity of the layer 240
Data Source
AI summary
Ferroelectric devices, including FeFET and/or FeRAM devices, include ferroelectric material layers deposited using atomic layer deposition (ALD). By controlling parameters of the ALD deposition sequence, the crystal structure and ferroelectric properties of the ferroelectric layer may be engineered. An ALD deposition sequence including relatively shorter precursor pulse durations and purge durations between successive precursor pulses may provide a ferroelectric layer having relatively uniform crystal grain sizes and a small mean grain size (e.g., ≤3 nm), which may provide effective ferroelectric performance. An ALD deposition sequence including relatively longer precursor pulse durations and purge durations between successive precursor pulses may provide a ferroelectric layer having less uniform crystal grain sizes and a larger mean grain size (e.g., ≥7 nm). Ferroelectric layers having larger mean grain sizes may exhibit enhanced crystallinity and a stabilized orthorhombic crystal phase, particularly in relatively thin layers (e.g., ≤15 nm in thickness).