3D Ferroelectric Memory Stack With Discrete Alloyed Cell Layers
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Solution Overview
Problem
Current semiconductor memory devices face challenges in effectively utilizing ferroelectric materials for data storage due to limitations in the integration and performance of ferroelectric elements in three-dimensional memory structures.
Innovation Solution
The development of a semiconductor memory device with a vertical stack of discrete ferroelectric material portions formed by alloying first and second dielectric metal oxide materials, integrated with a vertical semiconductor channel and dielectric material portions, within an alternating stack of insulating and conductive layers, enhancing data storage capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If ferroelectric materials are integrated into three-dimensional memory structures, then memory density and storage capacity are improved, but integration complexity and manufacturing difficulty increase
Solution Approach 1:
The ferroelectric layer is segmented into multiple discrete ferroelectric portions (first, second, third ferroelectric portions) at different vertical levels within the memory structure. This segmentation allows independent formation and control of ferroelectric materials at each level, reducing the overall integration complexity while maintaining high memory density through three-dimensional stacking.
Solution Approach 2:
The patent transitions from planar ferroelectric integration to vertical three-dimensional integration by forming ferroelectric portions at multiple height levels (first level, second level, third level). This dimensional change enables higher memory density without proportionally increasing manufacturing complexity, as each level can be formed using similar processes stacked vertically.
2Ease of manufacture
If conventional ferroelectric materials are used, then manufacturing process is simpler, but switching speed and endurance are insufficient
Solution Approach 1:
The patent employs composite ferroelectric materials including hafnium oxide (HfO2) and zirconium oxide (ZrO2) in specific ratios and compositions at different vertical levels. These composite materials provide enhanced switching speed and endurance while maintaining compatibility with existing manufacturing processes, achieving both improved performance and ease of manufacture.
Solution Approach 2:
The patent optimizes material parameters such as the ratio of hafnium oxide to zirconium oxide, layer thicknesses, and deposition conditions to achieve the desired switching characteristics. By carefully controlling these parameters, the patent achieves fast switching speed and high endurance while keeping the manufacturing process relatively simple and scalable.
3Reliability
If discrete ferroelectric material portions are formed through alloying, then switching performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent forms separate hafnium oxide and zirconium oxide layers at different vertical levels before performing the alloying process. This preliminary separation allows precise control over the spatial distribution of materials, and the subsequent alloying creates the desired composite ferroelectric portions with controlled compositions, achieving both good switching performance and manageable manufacturing precision.
Solution Approach 2:
The patent applies different material compositions and ratios at different vertical levels (first, second, and third ferroelectric portions may have different HfO2:ZrO2 ratios). This local quality approach allows optimization of switching performance for each level while using standard alloying processes, thereby achieving improved switching performance without requiring ultra-precise manufacturing control across the entire structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves data storage efficiency, reduces cross-talk between memory cells, and allows for precise control of metal atom ratios, leading to improved ferroelectric performance and scalability in three-dimensional memory arrays.
Implementation Method 1
alloying the second dielectric metal oxide material and the first dielectric metal oxide material at interfaces between the first dielectric metal oxide layer and the second dielectric metal oxide layer
Implementation Method 2
converting these layers into discrete ferroelectric materials through thermal annealing
Data Source
AI summary
A semiconductor memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical stack of discrete ferroelectric material portions and a vertical semiconductor channel. In one embodiment, the discrete ferroelectric material portions include a ferroelectric alloy material of a first dielectric metal oxide material and a second dielectric metal oxide material. In another embodiment, each of the discrete ferroelectric material portions is oxygen-deficient.