Crystalline Ferroelectric Memory Cell Thinning for Higher On-Current

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Solution Overview

Problem

The low on-current characteristics of ferroelectric layers in semiconductor devices, particularly in cross-point structure cells, hinder the implementation of crystalline thin-film ferroelectric layers due to low on/off current ratios, making it difficult to achieve efficient power consumption and operation speed.

Innovation Solution

A semiconductor device is designed with a crystalline thin-film ferroelectric layer sandwiched between a lower and upper electrode, and a method involving atomic layer etching is used to thin the crystalline thick-film ferroelectric layer, forming a memory cell with a crystalline thin-film ferroelectric layer and upper electrode, enhancing on-current characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a cross-point structure cell is used with a ferroelectric layer, then power consumption is reduced due to low on-current characteristics, but the on/off current ratio becomes too low to be practical

Engineering Contradiction:
Improvepower consumptionVSAvoidon/off current ratio
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent changes the physical parameters of the ferroelectric layer by reducing its thickness to a thin-film configuration (e.g., 5-20 nm). This parameter change fundamentally alters the electrical characteristics, enabling high on/off current ratios while maintaining low power consumption, thus resolving the contradiction between energy efficiency and device reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures combining the ferroelectric layer with specific electrode materials and interface layers. This composite approach optimizes the electrical properties at interfaces, enhancing carrier transport when needed (improving on-current) while maintaining the ferroelectric switching characteristics, thereby achieving both low power consumption and high on/off current ratio

Inventive Principle:
Principle #40Composite materials

2Reliability

If a thick-film ferroelectric layer is used, then ferroelectric properties are strong, but the on-current characteristics remain low

Engineering Contradiction:
Improveferroelectric propertiesVSAvoidon-current
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent applies parameter change by transitioning from thick-film to thin-film ferroelectric layers. This reduction in thickness parameter simultaneously improves on-current characteristics while preserving essential ferroelectric properties through careful selection of the thin-film thickness range and material composition

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The crystalline thin-film ferroelectric layer exhibits high on-current and on/off current gain characteristics, leading to low power consumption and high-speed operation of semiconductor devices.

Implementation Method 1

a crystalline thin-film ferroelectric layer and a method of manufacturing the semiconductor device having the crystalline thin-film ferroelectric layer

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 2

thinning the crystalline thick-film ferroelectric layer by performing a first atomic layer etching process

Methodology Applied
Scientific EffectAtomic layer etching:

Data Source

PatentUS20250338501A1Semiconductor device having a crystalline thin-film ferroelectric layer and method of manufacture
Publication Date: 2025.10.30 SK HYNIX INC
  • US20250338501A1 patent drawing
  • US20250338501A1 patent drawing
  • US20250338501A1 patent drawing

AI summary

A semiconductor device includes a first interconnection line extending in a first horizontal direction; a second interconnection line extending in a second horizontal direction, the first horizontal direction and the second horizontal direction intersect each other; and a memory cell disposed between the first interconnection line and the second interconnection line. The memory cell includes a lower electrode; a crystalline ferroelectric layer on the lower electrode; and an upper electrode on the crystalline ferroelectric layer.