Ferroelectric Memory Gate Insulating Film Segmentation
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Solution Overview
Problem
Ferroelectric memories face degradation in memory characteristics due to inter-cell interference and variations in threshold voltage when scaled down, particularly due to partial polarization of gate insulating films and fringe electric field effects.
Innovation Solution
A storage device configuration with a stacked body including gate electrode layers and a gate insulating film containing hafnium oxide, where the gate insulating film has distinct ferroelectric and paraelectric regions with varying thicknesses to separate ferroelectric materials under word lines, reducing inter-cell interference and threshold voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If ferroelectric memory is scaled down to increase integration density, then productivity and storage capacity improve, but memory characteristics degrade due to inter-cell interference and threshold voltage variations
Solution Approach 1:
The gate insulating film is segmented into distinct ferroelectric and paraelectric regions along the thickness direction. This segmentation creates isolated ferroelectric zones under each word line, preventing polarization interference between adjacent memory cells while maintaining high integration density through vertical stacking
Solution Approach 2:
Different regions of the gate insulating film are assigned different dielectric properties: the ferroelectric region provides high dielectric constant for strong polarization effect under each word line, while the paraelectric region provides low dielectric constant to minimize fringe field effects and inter-cell interference, optimizing local functionality for each zone
2Area of stationary object
If gate insulating film is made thinner to reduce device size, then area reduces, but partial polarization occurs causing threshold voltage variation
Solution Approach 1:
The gate insulating film is divided into discrete ferroelectric regions separated by paraelectric regions. This segmentation confines the polarization effect to specific localized zones directly under each word line, preventing lateral spread of polarization that would cause threshold voltage variation, while maintaining thin overall film structure for small device area
Solution Approach 2:
The paraelectric region acts as an intermediary barrier between adjacent ferroelectric regions. Its low dielectric constant property blocks the propagation of fringe electric fields and prevents partial polarization from affecting neighboring memory cells, thereby stabilizing threshold voltage across the device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses degradation of memory characteristics and threshold voltage variations, enhancing the reliability of ferroelectric memory cells by physically separating ferroelectric materials and utilizing paraelectric regions with lower dielectric constants.
Implementation Method 1
The ferroelectric memory uses the polarization inversion of the ferroelectric material to perform writing of data into a memory cell and erasing of data from the memory cell
Implementation Method 2
utilizing paraelectric regions with lower dielectric constants to suppress degradation of memory characteristics
Data Source
AI summary
Provided is a storage device according to an embodiment including: a stacked body including gate electrode layers stacked in a first direction; a semiconductor layer provided in the stacked body and extending in the first direction; and a gate insulating film provided between the semiconductor layer and the gate electrode layer, the gate insulating film having a first region disposed between the gate electrode layer and the semiconductor layer and a second region disposed between the two first regions adjacent to each other in the first direction, the gate insulating film containing a hafnium oxide, in which a first thickness of the first region in the second direction from the semiconductor layer toward the gate electrode layer is smaller than a second thickness of the second region in the second direction.