3D Ferroelectric Memory Array with Integrated Gate Selectors
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Solution Overview
Problem
Current ferroelectric memory devices face challenges in integrating effective gate selectors that prevent program or erase disturb, leading to inefficiencies in data storage and retrieval.
Innovation Solution
A three-dimensional ferroelectric memory array is developed, incorporating a ferroelectric field effect transistor (FeFET) with a semiconductor channel, a ferroelectric gate dielectric layer, and a bipolar selector material layer, which are strategically stacked and processed to form a vertical structure with integrated gate selectors, enabling precise control over data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional ferroelectric memory device structure is used, then the device is simpler to manufacture, but program or erase disturb occurs and data integrity deteriorates
Solution Approach 1:
The gate structure is segmented into multiple functional layers: a ferroelectric gate dielectric layer for non-volatile memory storage and a bipolar selector material layer for selective cell access. This segmentation allows each layer to perform its specific function independently, preventing program/erase disturb while maintaining data integrity.
Solution Approach 2:
The bipolar selector material layer acts as an intermediary between the control gate and the ferroelectric gate dielectric layer. This intermediary layer enables selective activation of memory cells through voltage threshold switching, ensuring that only intended cells are programmed or erased, thus preventing disturb effects on neighboring cells.
2Reliability
If a bipolar selector material layer is integrated into the FeFET gate structure, then program or erase disturb is prevented, but the manufacturing process becomes more complex
Solution Approach 1:
The bipolar selector material layer and ferroelectric gate dielectric layer are merged into a single integrated gate stack structure. This combination allows both the selector function and the ferroelectric memory function to be achieved within one unified structure, reducing the need for separate components and simplifying the overall device architecture despite the added layer.
Solution Approach 2:
The gate structure employs composite materials comprising both ferroelectric material (for non-volatile storage) and bipolar selector material (for selective access). This composite approach enables the simultaneous achievement of non-volatile memory functionality and selective cell addressing, preventing program/erase disturb while maintaining manufacturability through established thin-film deposition techniques.
3Quantity of substance
If vertical stacking of semiconductor channels and gate structures is implemented, then data storage density is improved, but manufacturing precision requirements increase
Solution Approach 1:
The memory structure transitions from a planar two-dimensional layout to a vertical three-dimensional stacked architecture. Multiple semiconductor channels are stacked vertically with corresponding gate structures, increasing data storage density by utilizing the vertical dimension. This dimensional change allows higher capacity without increasing the device footprint.
Solution Approach 2:
The vertical stack structure serves multiple functions simultaneously: the ferroelectric gate dielectric layer provides non-volatile storage, the bipolar selector layer enables selective cell access, and the vertical stacking achieves high density. This multi-functional design consolidates several requirements into a single integrated structure, managing manufacturing precision through unified process control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of a bipolar selector material layer between the gate electrode and ferroelectric gate dielectric layer in the FeFET enhances data integrity by preventing program or erase disturb, thereby improving the efficiency and reliability of data storage in the three-dimensional memory array.
Implementation Method 1
A ferroelectric material refers to a material that displays spontaneous polarization of electrical charges in the absence of an applied electric field. The net polarization P of electrical charges within the ferroelectric material is non-zero in the minimum energy state. Thus, spontaneous ferroelectric polarization of the material occurs
Implementation Method 2
The orientation of the dipole moment may be detected by measuring electrical current passing through a semiconductor channel provided adjacent to the ferroelectric material in a field effect transistor ferroelectric memory device
Data Source
AI summary
A ferroelectric field effect transistor (FeFET) includes a semiconductor channel, a source region contacting one end of the semiconductor channel, a drain region contacting a second end of the semiconductor channel, a gate electrode, a ferroelectric gate dielectric layer located between the semiconductor channel and the gate electrode, and a bidirectional selector material layer located between the gate electrode and the ferroelectric gate dielectric layer.