Ferroelectric Memory Device With Hole Transfer Layer
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Solution Overview
Problem
Semiconductor memory devices using ferroelectric films face challenges in achieving both low-voltage operation and high reliability due to the formation of interfacial layers with low dielectric constants, which complicates data storage and retrieval processes.
Innovation Solution
The semiconductor memory device incorporates a n-type oxide semiconductor layer, such as indium gallium zinc oxide, as a channel region, and a ferroelectric layer composed of orthorhombic hafnium oxide, with an optional intermediate layer acting as an electronic barrier to prevent low dielectric constant interfacial layer formation, enabling efficient data storage through voltage-induced polarization changes without requiring a back gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric film is used for data storage, then data can be stored through voltage-induced polarization changes, but interfacial layers with low dielectric constants form, reducing reliability
Solution Approach 1:
A hole transfer layer made of p-type oxide semiconductor is introduced between the ferroelectric film and the n-type semiconductor layer. This intermediary layer prevents direct contact between the ferroelectric film and materials that would form low dielectric constant interfacial layers, thereby eliminating the harmful interfacial layer formation while maintaining the voltage-induced polarization storage function
Solution Approach 2:
The patent employs a composite structure combining p-type oxide semiconductor (hole transfer layer) and n-type oxide semiconductor (channel layer) with the ferroelectric film. This composite material approach allows each layer to perform its specific function: the p-type layer transfers holes during write operations, the n-type layer provides the channel, and the ferroelectric film stores data through polarization, collectively preventing interfacial degradation
2Reliability
If conventional semiconductor structures are used, then manufacturing is simpler, but achieving low-voltage operation with high reliability is difficult
Solution Approach 1:
The hole transfer layer serves multiple functions simultaneously: it transfers holes to the ferroelectric film during write operations, prevents interfacial layer formation, and maintains the low-voltage operation capability. This multi-functionality reduces the need for additional separate components, managing device complexity while achieving high reliability
Solution Approach 2:
The patent utilizes changes in material parameters (using p-type oxide semiconductor with specific properties for the hole transfer layer) to enable low-voltage operation. By selecting materials with appropriate band structures and carrier concentrations, the device achieves reliable low-voltage operation without requiring complex additional structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for reliable data storage and retrieval operations at lower voltages, enhancing the device's reliability and simplifying the structure by preventing interfacial leakage and maintaining the polarized state of the ferroelectric layer effectively.
Implementation Method 1
Semiconductor memory devices which use the spontaneous polarization of a ferroelectric film are attracting attention. In such a semiconductor memory device, each memory cell includes a ferroelectric film, and, by applying a voltage to the ferroelectric film, the direction or polarizability of spontaneous polarization, data can be caused to be stored in the memory cell.
Implementation Method 2
A first semiconductor layer electrically connected to a first electrode and a second electrode and including an n-type oxide semiconductor
Implementation Method 3
with an optional intermediate layer acting as an electronic barrier to prevent low dielectric constant interfacial layer formation
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a ferroelectric layer and a first semiconductor layer. The first semiconductor layer is electrically connected to a first electrode and a second electrode and includes an n-type oxide semiconductor. A third electrode is opposite the first semiconductor layer. The ferroelectric layer is between the third electrode and the first semiconductor layer. A second semiconductor layer includes at least one of a Group IV semiconductor material or a p-type oxide semiconductor material. The first semiconductor layer is between the ferroelectric layer and the second semiconductor layer.