Ferroelectric Memory Cell Interface Layer for Charge Trapping

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Solution Overview

Problem

Ferroelectric non-volatile memory devices face issues with charge trapping, which leads to shifts in polarization hysteresis, increased leakage current, and reduced lifetime due to defect sites at the interface between ferroelectric materials and electrodes, particularly in thin HfO2 layers.

Innovation Solution

Incorporating a Nb-doped oxide or metal interface layer with higher valence metals like Nb, Ta, and V at the interface between the ferroelectric material and electrodes to reduce oxygen vacancy-related defect sites and trap sites, thereby minimizing charge trapping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thin HfO2 layer is used to maintain ferroelectric properties, then the dead layer effect is reduced, but charge trapping at interface defect sites increases

Engineering Contradiction:
Improveferroelectric propertiesVSAvoidcharge trapping
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An interface layer comprising Nb-doped HfO2 or ZrO2 is introduced between the electrode and the ferroelectric HfO2 layer. This intermediary layer reduces oxygen vacancy-related defect sites and trap sites at the interface, thereby minimizing charge trapping while preserving the thin-film ferroelectric properties of the main storage layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If dopant species are incorporated into HfO2 layer during deposition, then remanent polarization is improved, but charge trapping at interface defect sites increases

Engineering Contradiction:
Improveremanent polarizationVSAvoidcharge trapping
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies different doping strategies to different regions: the main ferroelectric HfO2 layer contains dopant species (Al, Ti, Ta, Nb, Sr, or Ba) to enhance remanent polarization, while the interface layer specifically uses Nb-doped HfO2 or ZrO2 to minimize oxygen vacancies and charge trapping. This local differentiation of material properties resolves the contradiction between improving polarization and reducing interface defects.

Inventive Principle:
Principle #3Local quality

3Object-affected harmful factors

If a thick interface layer is used as barrier, then charge trapping and leakage currents are reduced, but the dead layer effect increases

Engineering Contradiction:
Improvecharge trappingVSAvoidferroelectric properties
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The interface layer uses Nb doping to fundamentally change the material properties by reducing oxygen vacancy concentration and creating a more stable interface. This allows achieving low charge trapping with a thin layer (5-20 nm) rather than requiring a thick barrier layer, thus maintaining the thin-film ferroelectric properties while reducing harmful charge trapping effects.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces trap sites, enhancing the ferroelectric properties, improving the memory window, and increasing the cycling endurance and lifetime of ferroelectric devices by reducing leakage currents and avoiding internal bias fields.

Implementation Method 1

Incorporating a Nb-doped oxide or metal interface layer with higher valence metals like Nb, Ta, and V at the interface between the ferroelectric material and electrodes to reduce oxygen vacancy-related defect sites and trap sites

Methodology Applied
Scientific EffectOxygen vacancy reduction:

Implementation Method 2

A ferroelectric (FE) material is a dielectric crystal that exhibits a spontaneous electric polarization. The direction of spontaneous polarization can be reversed between two crystallographic defined states by application of an external electric field.

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 3

The switching is caused by applying an electrical field via voltage between transistor gate and transistor channel. Specially, for n-channel transistors, ferroelectric switching after application of a sufficiently high positive voltage pulse causes a shift of the threshold voltage to lower or negative threshold voltage values.

Methodology Applied
Scientific EffectFerroelectric switching:

Data Source

PatentUS10600808B2Ferroelectric memory cell for an integrated circuit
Publication Date: 2020.03.24 SONY SEMICON SOLUTIONS CORP
  • US10600808B2 patent drawing
  • US10600808B2 patent drawing
  • US10600808B2 patent drawing

AI summary

An integrated circuit comprises a ferroelectric memory cell including an oxide storage layer, an electrode layer, and an interface layer. The oxide storage layer comprises a ferroelectric material that is at least partially in a ferroelectric state. The ferroelectric material comprises, as main components, oxygen and any of the group consisting of Hf, Zr and (Hf,Zr). The interface layer is disposed between the oxide storage layer and the electrode layer and includes at least one element with a higher valence value than Hf or Zr.