Ferroelectric Memory Interfacial Layer Design for Phase Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Ferroelectric memory devices using HfO2 films face issues due to the shift from a metastable orthorhombic crystal phase to a stable monoclinic phase during high-temperature heat treatment, leading to paraelectric behavior and performance deterioration, along with challenges in preventing charge trapping and dielectric breakdown in interfacial layers.
Innovation Solution
A semiconductor device structure is implemented with a paraelectric film as an interfacial layer between the ferroelectric film and the semiconductor substrate, and a metal film is used to enhance the ferroelectric film's crystallization, maintaining orthorhombic crystal grains and reducing charge trapping and dielectric breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If high-temperature heat treatment is performed to crystallize the HfO2 film, then the crystal phase transforms from amorphous to crystalline, but the crystal phase shifts from the desired orthorhombic phase to the stable monoclinic phase, causing the film to become paraelectric and lose ferroelectric properties
Solution Approach 1:
The patent applies parameter changes by controlling the oxygen partial pressure during heat treatment (maintaining it at 10^-5 to 10^-1 Pa) and using specific heating rates (50 to 200°C/min) to transform the HfO2 film from amorphous to orthorhombic crystalline phase. By changing these thermal parameters, the film achieves and maintains the desired orthorhombic phase with ferroelectric properties rather than transforming to the stable monoclinic phase.
Solution Approach 2:
The patent utilizes phase transitions by controlling the heat treatment process to induce transformation from amorphous phase to orthorhombic crystalline phase. The specific heat treatment conditions (temperature range, heating rate, oxygen partial pressure) are optimized to achieve the desired phase transition while preventing transition to the monoclinic phase, thereby maintaining ferroelectric properties.
2Reliability
If an interfacial layer is inserted between the semiconductor substrate and ferroelectric film to prevent charge trapping, then charge trapping is reduced, but the low dielectric constant of the interfacial layer causes dielectric breakdown under electric field
Solution Approach 1:
The patent employs composite materials by forming a multi-layer structure consisting of an interfacial layer (such as SiN or SiO2) combined with a metal film layer (such as TiN, TaN, or WN). This composite structure leverages the charge trapping prevention capability of the interfacial layer while the metal film layer provides high dielectric strength and breakdown resistance, thereby resolving the contradiction between charge trapping prevention and dielectric breakdown resistance.
Solution Approach 2:
The metal film layer acts as an intermediary between the interfacial layer and the ferroelectric film. It provides mechanical support and electrical stability, preventing direct stress concentration on the interfacial layer that would lead to dielectric breakdown, while allowing the interfacial layer to perform its charge trapping prevention function.
3Speed
If a metal film is inserted between the interfacial layer and ferroelectric film to improve electric field application, then polarization inversion efficiency is enhanced, but the low electrostatic capacitance of the interfacial layer requires higher voltage which increases power consumption
Solution Approach 1:
The patent uses composite materials by combining the interfacial layer with a metal film layer (TiN, TaN, WN, etc.) to create a structure with optimized electrical characteristics. The metal film layer has high electrostatic capacitance that compensates for the low capacitance of the interfacial layer, enabling efficient electric field application and fast polarization inversion at lower voltages, thereby reducing power consumption while maintaining high switching speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the reliability and performance of the ferroelectric memory by maintaining ferroelectric properties, reducing operating voltage, and enhancing information retention.
Implementation Method 1
the crystal phase of the HfO2 film needs to be orthorhombic. However, the orthorhombic crystal phase is a metastable phase. When an amorphous (non-crystalline) HfO2 film is formed over a semiconductor substrate during a manufacturing process of a semiconductor device and then heat treatment is performed for crystallization at a high temperature of, e.g., about 600 to 1000° C., the crystal phase of the HfO2 film shifts to a monoclinic crystal phase
Implementation Method 2
heat treatment is performed for crystallization at a high temperature of, e.g., about 600 to 1000° C.
Implementation Method 3
if an electron that has entered the ferroelectric film from a semiconductor substrate is trapped in the ferroelectric film, the performance of the ferroelectric film deteriorates. To prevent this, it can be considered to insert an interfacial layer (block layer) under the ferroelectric film and thus inhibit the performance deterioration of a ferroelectric layer due to charge trapping.
Implementation Method 4
a metal film is used to enhance the ferroelectric film's crystallization, maintaining orthorhombic crystal grains
Data Source
AI summary
In a ferroelectric memory having a ferroelectric film between a gate electrode and a semiconductor substrate, dielectric breakdown of a gate insulating film is prevented and the polarization performance of the ferroelectric film is enhanced to improve the performance of a semiconductor device. In a memory cell including a field effect transistor including a control gate electrode formed over the semiconductor substrate, between the control gate electrode and a main surface of the semiconductor substrate, a paraelectric film and the ferroelectric film are formed by being stacked in this order over the main surface of the semiconductor substrate.