Autonomous Ferroelectric Memory Latch for Power-Interrupt Logic
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Solution Overview
Problem
Existing logic circuits that operate across power disruptions face challenges in maintaining system state due to limitations in energy storage and complexity in using non-volatile memory for state preservation, particularly with ferroelectric memory devices requiring separate save/restore procedures and being prone to data alteration during power instability.
Innovation Solution
A circuit with an autonomous memory latch (AML) that includes a ferroelectric capacitor, a conductive load, and a switch with a current-actuated control input, allowing the circuit to maintain its state across power disruptions by preventing state changes during power transitions and using a feedback loop to ensure accurate state preservation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ferroelectric non-volatile memory is used to store system state, then the memory operates at the same logic levels as the circuitry and can be read/written in comparable times, but the memory must be read and written synchronously requiring a separate save/restore procedure that adds complexity
Solution Approach 1:
The patent merges the memory storage function with the logic circuit operation by embedding the ferroelectric capacitor directly within the logic circuit path. The capacitor is connected between the input and output of the logic circuit, allowing it to continuously track and preserve the circuit state without requiring separate save/restore procedures. This integration eliminates the need for additional control logic and synchronous read/write operations.
Solution Approach 2:
The ferroelectric capacitor continuously tracks the logic circuit state in real-time during normal operation, maintaining the state information ready for immediate restoration. This preliminary tracking action ensures that when power disruption occurs, the state is already captured and can be automatically restored without requiring a separate save operation or complex restore procedure.
2Loss of information
If non-volatile memory operates at different logic levels or frequencies than the circuitry, then the memory can store state information, but the memory cannot track the state of the system in real time and requires different voltages and cycle times
Solution Approach 1:
The patent uses a ferroelectric capacitor that operates at the same logic levels and voltage ranges as the associated logic circuitry. This homogeneity allows the capacitor to directly track the circuit state in real-time without requiring voltage level conversion or frequency synchronization, enabling continuous state tracking at the same operating conditions as the logic circuit.
3Adaptability or versatility
If ferroelectric memory is written by voltages within normal logic levels, then the memory can be integrated with logic circuitry, but preventing alteration of data during power instability such as power down or power up poses significant challenges
Solution Approach 1:
The patent exploits the ferroelectric capacitor's inherent ability to retain state information through power disruptions by positioning it directly in the logic circuit path. The capacitor's non-volatile nature, which allows it to maintain state without power, is converted into a protective mechanism that automatically preserves circuit state during power transitions without requiring additional protection logic or complex control sequences.
4Reliability
If a separate save/restore mode is implemented, then the system can preserve state across power disruptions, but the complexity and cost of the system increases
Solution Approach 1:
The patent combines the memory function with the logic circuit by embedding the ferroelectric capacitor within the circuit path. This integration eliminates the need for separate save/restore control logic, mode switching mechanisms, and additional management circuitry, thereby reducing overall system complexity and cost while maintaining state preservation capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The AML circuit effectively preserves the system state during power disruptions, reducing complexity and cost by allowing direct tracking of system state in real-time without the need for separate save/restore procedures and minimizing data alteration risks during power instability.
Implementation Method 1
The present invention includes an autonomous memory circuit (AML) having an input, an output, a first power contact, a second power contact and a state
Implementation Method 2
The AML circuit could include a conductive load connected between a power rail and an output node of the AML
Implementation Method 3
The present invention also includes a switch in series with the AML input or the AML output. The switch is positioned to prevent the state of the AML from changing when power is provided between the first and second AML power contacts
Data Source
AI summary
A circuit having an autonomous ferroelectric memory latch (AML) is disclosed. An AML characterized by an AML input, an AML output, a first AML power contact, a second AML power contact and an AML state, and a first switch in series with one of the AML input or the AML output. The switch is positioned to prevent the state of the AML from changing when power is provided between the first and second AML power contacts. In one aspect of the invention, the circuit could include a second switch in series with the other of the AML input or the AML output and a latch in series with the AML input or the AML output. The latch is positioned such that a direct path back does not exist between the AML output and the AML input.