Ferroelectric Memory Local Sense Amplifier Using Unity Gain Buffer
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Solution Overview
Problem
Existing ferroelectric memory devices face challenges in achieving high-endurance, low operational voltage, low power consumption, and high-speed operation, particularly in architectures like 1T1C cells, where generating a reference voltage for local sense amplification is inefficient and requires large die size.
Innovation Solution
Implementing a local sense amplifier with a unity gain buffer to generate and buffer the reference voltage, allowing for efficient local bit-line amplification to rail-to-rail supply voltages, reducing die size and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a reference voltage generator is implemented for local sense amplification in 1T1C cells, then local bit-line amplification to rail-to-rail supply voltages is enabled, but die size increases
Solution Approach 1:
The patent merges the reference voltage generation function with the existing bit-line structure by using a unity gain buffer that operates on the bit-line itself. Instead of adding a separate reference voltage generator, the system uses the bit-line signal combined with a reference voltage through a unity gain buffer to generate the amplified signal, thereby eliminating the need for additional dedicated reference voltage generation circuitry and reducing die size.
Solution Approach 2:
The unity gain buffer circuit serves multiple functions: it buffers the bit-line signal, generates the reference voltage for comparison, and provides local sense amplification. This multi-functional approach eliminates the need for separate dedicated circuits for each function, thereby reducing the overall die size while maintaining rail-to-rail amplification capability.
2Use of energy by stationary object
If local sense amplification is implemented with unity gain buffer, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The local sense amplifier circuit uses the bit-line signal itself as part of the amplification process through the unity gain buffer. The circuit leverages the existing signal on the bit-line rather than requiring external reference voltage generation, thereby reducing power consumption. The self-service approach allows the circuit to generate its own reference signal from the bit-line, minimizing additional power requirements.
3Power
If reference voltage is generated using conventional methods, then local bit-line amplification is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent extracts the reference voltage generation function from a separate dedicated circuit and integrates it into the bit-line signal processing path. By using a unity gain buffer that operates on the bit-line itself, the system eliminates the need for complex external reference voltage generation circuitry, thereby simplifying manufacturing while maintaining the ability to achieve rail-to-rail amplification.
Data Source
AI summary
A FRAM memory device can include a plurality of FRAM memory cells, each FRAM memory cell including one transistor and one capacitor electrically coupled to the at least one transistor. The capacitor can be configured to store a bit of data. The memory device can also include a local bit-line configured to carry data to be read from or written to the plurality of memory cells. The memory device can further include a global bit-line configured to communicate with the local bit-line to carry the data to be read from or written to the plurality of memory cells. The memory device can additionally include a local sense amplifier configured to amplify a signal in the local bit-line and transfer the amplified signal to the global bit-line based on a reference signal. The local sense amplifier can be configured to generate the amplified signal based on comparison to the reference signal.