Ferroelectric Memory Cell Overlapping Active Regions
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Solution Overview
Problem
Conventional ferroelectric random access memory devices face challenges in reducing bit line length and improving integration density, leading to larger device sizes and increased power consumption, especially when used in display drive integrated circuits where wiring spacing is a concern.
Innovation Solution
The design incorporates overlapping active regions connected to ferroelectric capacitors on both sides of bit lines, reducing bit line length and capacitance, and optimizing the arrangement of word and plate lines to minimize loads and enhance integration density while conforming to permitted wiring spacings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If active regions are arranged in a line along the bit line, then the ferroelectric memory cell area is reduced, but the bit line length increases
Solution Approach 1:
The patent transitions from a one-dimensional linear arrangement of active regions along the bit line to a two-dimensional overlapping arrangement where active regions on opposite sides of the bit line overlap in the direction perpendicular to the bit line extension. This dimensional change allows the bit line to serve multiple memory cells simultaneously, reducing bit line length while maintaining compact cell area
Solution Approach 2:
The patent merges the functions of bit lines by allowing a single bit line to be shared by multiple first active regions and multiple second active regions through the overlapping arrangement. This combining approach reduces the total number of bit lines required, thereby reducing overall bit line length and associated capacitance
2Use of energy by moving object
If bit line length is reduced, then power consumption is reduced, but integration density in the direction the bit lines extend must be improved
Solution Approach 1:
By arranging active regions to overlap in the direction perpendicular to bit line extension, the patent achieves higher integration density without extending bit line length. This dimensional rearrangement allows more memory cells to be packed into the same area while keeping bit lines short, thus reducing power consumption while maintaining productivity
3Length of stationary object
If wiring spacing is increased for display connection, then device size increases, but integration density must be maintained
Solution Approach 1:
The overlapping arrangement of active regions in the direction perpendicular to bit line extension allows the memory device to achieve high integration density within a compact footprint. This enables the device to accommodate larger wiring spacing for display connections without sacrificing integration density, as the memory cells are efficiently packed in the vertical dimension
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a ferroelectric random access memory device with reduced size and power consumption, improved integration density, and reduced noise superposition, suitable for high-density memory applications in display drive integrated circuits.
Implementation Method 1
store information by utilizing the hysteresis found between the polarization and electric field of ferroelectric material
Data Source
AI summary
A ferroelectric random access memory device, includes at least one bit line extending in a first direction; a plurality of first active regions, arranged in the first direction a predetermined distance from each other on one side of the bit line, each being connected to the bit line and a first ferroelectric capacitor; and a plurality of second active regions, arranged in the first direction a predetermined distance from each other on the other side of the bit line, each being connected to the bit line and a second ferroelectric capacitor, the first active regions partly overlapping, in the first direction, the second active regions respectively neighboring the first active regions, and being arranged a predetermined distance from the respective neighboring second active regions in a second direction crossing the first direction.