Ferroelectric Memory Structure With Oxide Barrier for Switch Control
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving better control over ferroelectric random-access memory (FeRAM) switches as it advances to higher device density, particularly in integrating logic circuits with non-volatile memory circuits within a single chip, where existing technologies struggle with the precision and efficiency of manufacturing processes.
Innovation Solution
A method for manufacturing a semiconductor structure that includes forming a word line in a dielectric layer over a substrate, followed by a ferroelectric layer, source and bit lines, and an oxide semiconductor layer, with specific etching and deposition processes to create a memory structure that minimizes hydrogen ion diffusion and enhances performance by positioning the oxide semiconductor layer after forming the gate and source/drain structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If existing manufacturing processes are used for FeRAM, then device density can be increased, but control precision of the FeRAM switch deteriorates
Solution Approach 1:
The oxide semiconductor layer is formed before the ferroelectric layer in the memory structure. This preliminary formation allows the oxide semiconductor to serve as a buffer that prevents hydrogen ion diffusion from subsequent processing steps into the ferroelectric layer, thereby maintaining switch control precision even as device density increases
Solution Approach 2:
The oxide semiconductor layer acts as an intermediary barrier between the ferroelectric layer and the environment. It mediates by blocking hydrogen ions from reaching the ferroelectric layer during manufacturing processes, thus preserving the electrical properties and control precision of the FeRAM switch while enabling higher device density
2Adaptability or versatility
If FeRAM is integrated with logic circuits on one chip, then functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The memory structure is segmented into distinct functional layers: oxide semiconductor layer, ferroelectric layer, and electrode structures. This segmentation allows each layer to be optimized independently for its specific function while simplifying the overall manufacturing process through standardized layer-by-layer fabrication
Solution Approach 2:
The oxide semiconductor layer serves multiple functions simultaneously: it acts as a buffer against hydrogen ion diffusion, provides electrical isolation, and enables compatibility with standard CMOS logic circuit manufacturing processes. This multi-functionality reduces overall manufacturing complexity while achieving integration of FeRAM with logic circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the performance of FeRAM by reducing hydrogen ion diffusion and optimizing the electrical properties of the memory structure, leading to enhanced control and efficiency in higher density device integration.
Implementation Method 1
improves the performance of FeRAM by reducing hydrogen ion diffusion
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a gate structure, disposed over a substrate; a ferroelectric material, disposed over the gate structure; a source structure and a drain structure, disposed above the ferroelectric material; an isolation, surrounding the source structure and the drain structure; and an oxide semiconductor, surrounding a portion of the isolation between the source structure and the drain structure. A method of manufacturing the semiconductor structure is also provided.